Relationship between CAN identifiers, filters and maskers
The CAN node uses the identifier to identify whether the CAN frame is what it wants. The identification method is to set the filter mask register to complete the
The receive filter register sets the value of each bit of the identifier, and the receive mask register generally has the same number of matching receive filter registers, which specifies the receive
Does the value of each bit of the receive filter register identifier need to be matched? For example, the chip is equipped with 6 receive filter registers and 6 receive shield registers.
The CAN frame is received from the bus through the register, and then the received CAN frame identifier is matched with 6 pairs of receiving filter and mask registers in turn.
If a pair of receive filter and mask registers are required, the matching stops and the data is received into the corresponding buffer.
For example: Set a receive filter register to 00000000001 (11 bits) and a receive mask register to 11111111101 (11 bits).
The combination will reject all CAN frames corresponding to identifiers other than 00000000011 and 00000000001, because the mask specifies that the second bit
All identifier bits except the first bit (0) must be strictly matched (consistent with the filter value), the filter value of the second bit and the received CAN identifier bit
It doesn't matter whether the two values are consistent.
Take the PIC18F45K80 microcontroller as an example:
①、CAN transmission
/Extended frame mode send ID settings are as follows/
TXB0CON=0X03; //The sending priority is the highest priority, TXPRI=11
//The ID is set as follows [here the 29-bit extended identifier ID is set to: 1fffffff]
TXB0SIDH=0XFF;
TXB0SIDL=0XEB; //Configure extended frame mode EXIDE=1, EID17=1, EID16=1
TXB0EIDH=0XFF; //EID8-EID15
TXB0EIDL=0XFF; //EID0-EID7
/-------------------------------------------------------------------------
can send data length setting, send buffer initialization
-------------------------------------------------------------------------/
//Set the data length to 8 bytes
TXB0DLC=0X08;
// Initialize the send buffer
TXB0D0=0x00;
TXB0D1=0x00;
TXB0D2=0x00;
TXB0D3=0x00;
TXB0D4=0x00;
TXB0D5=0x00;
TXB0D6=0x00;
TXB0D7=0x00;
②, CAN receiving
RXB0CON=0X40; //Only receive valid information of standard identifier, FILHIT0=0 means RXB0 uses filter0
RXB0DLC=0X08; //Set the data area length of receive buffer 0
RXB0D0=0X00; //Initialize the data area of receive buffer 0
RXB0D1=0X00;
RXB0D2=0X00;
RXB0D3=0X00;
RXB0D4=0X00;
RXB0D5=0X00;
RXB0D6=0X00;
RXB0D7=0X00;
// Initialize receive filter 0 and receive mask, (extended frame configuration)
RXF0SIDH=0XFF;
RXF0SIDL=0XEB; /*(EXIDEN = 1, enable extended frame)*/
RXF0EIDH=0XFF;
RXF0EIDL=0XFF;
//Extended indicator mask register setting
RXM0SIDH=0X00; /*No mask*/ //Standard identifier mask bit or extended identifier mask bit (EID<28:21>)
RXM0SIDL=0X00; //SID<2:0>: Standard identifier mask bit or extended identifier mask bit (EID<20:18>)
RXM0EIDH=0xff;
RXM0EIDL=0X00;
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