ARM instruction set version and ARM version

We often see different expressions such as ARM7, ARM9, ARM11, and armv6k. And in GCC compilation, we often use -march, -mcpu, etc. What do they mean? Sam himself is not very clear, but he has a vague idea. Let's study it carefully today.

ARM (Advanced RISC Machines) is a well-known company in the microprocessor industry. It has designed a large number of high-performance, low-cost, low-energy RISC processors, related technologies and software. In 1985, the first ARM prototype was born in Cambridge, England. The characteristic of ARM is that it only designs chips but does not produce them. ARM licenses its technology to many famous semiconductor, software and OEM manufacturers in the world, and each manufacturer gets a unique set of ARM-related technologies and services. Using this partnership, ARM soon became the creator of many global RISC standards.

ARM has defined 6 major instruction set architecture versions: V1-V6. (So the ARMv6 mentioned above refers to the instruction set version number).

ARMV1:

The prototype of this version was an ARM1 and was not used in commercial products.

ARMV2:

 The V1 version has been expanded to include support for multiplication instructions with 32-bit results and coprocessor instructions.

ARVMv3:

 ARM's first microprocessor, the ARM6 core, is version 3, which is available as an IP core, a standalone processor, and an integrated CPU with on-chip cache, MMU, and write buffer.

ARMV4:

The most widely used ARM instruction set version.

ARM7TDMI, ARM720T, ARM9TDMI, ARM940T, ARM920T, Intel's StrongARM, etc. are based on ARMv4T.
ARMv5:

ARM9E-S, ARM966E-S, ARM1020E, ARM 1022E and XScale are ARMv5TE.

ARM9EJ-S, ARM926EJ-S, ARM7EJ-S, and ARM1026EJ-S are based on ARMv5EJ.

ARM10 also uses it.

The suffixes have the following meanings:

E: Enhanced DSP instruction set, including all algorithms and 16-bit multiplication operations.

J: Support new Java.

ARMv6:

The processor that uses the ARMv6 core is the ARM11 series.

ARM1136J(F)-S is based on ARMv6 and its main features include SIMD, Thumb, Jazelle, DBX, (VFP), and MMU.

ARM1156T2(F)-S is based on ARMv6T2. Its main features include SIMD, Thumb-2, (VFP), and MPU.

ARM1176JZ(F)-S is based on ARMv6KZ and adds MMU and TrustZone to ARM1136EJ(F)-S.

ARM11 MPCore is based on ARMv6K and can include 1-4 core SMP and MMU based on ARM1136EJ(F)-S.

ARMv7-A:

ARM processor core:

ARM has developed many ARM processor cores, the latest version is ARM11.

ARM7 microprocessor series
low-power 32-bit RISC processor, von Neumann architecture. Extremely low power consumption, suitable for portable products.
 With embedded ICE-RT logic, debugging and development are convenient.
 3-stage pipeline structure. Able to provide 0.9MIPS three-stage pipeline structure with
 high code density and compatible with 16-bit Thumb instruction set.
 Supports a wide range of operating systems, including Windows CE, Linux, Palm OS, etc.
 The instruction system is compatible with the ARM9 series, ARM9E series and ARM10E series, which is convenient for users to upgrade their products.
 The main frequency can reach up to 130MIPS.
 Main application areas: industrial control, Internet equipment, network and modem equipment, mobile phones and other multimedia and embedded applications.

 There are four types of ARM7TDMI microprocessors :
 ARM7TDMI, ARM7TDMI-S, ARM720T, and ARM7EJ.
 ARM7TMDI is the most widely used 32-bit embedded RISC processor and is a low-end ARM processor core.
 Note: The "ARM core" is not a chip. The ARM core is combined with other components such as RAM, ROM, and on-chip peripherals to form a real chip.

ARM9 microprocessor series
 The ARM9 series microprocessors provide the best performance in terms of high performance and low power consumption.
 5-stage integer pipeline,
 Harvard architecture.
 Supports 32-bit ARM instruction set and 16-bit Thumb instruction set.
 Full-performance MMU, supports multiple mainstream embedded operating systems such as Windows CE, Linux, Palm OS, etc.
 Supports data cache and instruction cache, with higher instruction and data processing capabilities.
 Main applications: wireless devices, instruments, security systems, set-top boxes, high-end printers, digital cameras and digital video cameras.
 3 types: ARM920T, ARM922T and ARM940T.

The ARM9E microprocessor series
 single processor core provides solutions for microcontrollers, DSP, and Java application systems.
 Supports DSP instruction set.
 5-level integer pipeline, higher instruction execution efficiency.
 Supports 32-bit ARM instruction set and 16-bit Thumb instruction set.
 Supports VFP9 floating-point processing coprocessor.
 Full-performance MMU supports multiple mainstream embedded operating systems such as Windows CE, Linux, and Palm OS.
 MPU supports real-time operating systems.
 Supports data cache and instruction cache, with
 a maximum main frequency of 300MIPS.
 Main applications: next-generation wireless devices, digital consumer products, imaging equipment, industrial control, storage devices, and network equipment.
 3 types: ARM926EJ-S, ARM946E-S, and ARM966E-S.

 Compared with the equivalent ARM9, the ARM10E microprocessor series has a nearly 50% performance improvement at the same clock frequency and extremely low power consumption.
 Supports DSP instruction set.
 6-stage integer pipeline, higher instruction execution efficiency.
 Supports 32-bit ARM instruction set and 16-bit Thumb instruction set.
 Supports VFP10 floating-point processing coprocessor.
 Full-performance MMU, supports multiple mainstream embedded operating systems such as Windows CE, Linux, Palm OS, etc.
 Supports data cache and instruction cache. The main
 frequency can reach up to 400MIPS.
 Embedded parallel read/write operation unit.
 Main applications: next-generation wireless devices, digital consumer products, imaging equipment, industrial control, communication and information systems.
 3 types: ARM1020E, ARM1022E and ARM1026EJ-S.

The SecurCore microprocessor series
 is designed for security needs and provides a complete 32-bit RISC technology security solution.
 Flexible protection units to ensure the security of operating systems and application data.
 Soft core technology is used to prevent external scanning and detection.
 Can integrate user's own security features and other coprocessors.
 Main applications: application products and application systems with high security requirements, such as e-commerce, e-government, e-banking, network and authentication systems.
 4 types: SecurCore SC100, SecurCore SC110, SecurCore SC200 and SecurCore SC210.

Xscale processor
 is a solution based on ARMv5TE architecture. It is a full-performance, cost-effective and low-power processor.
 It supports 16-bit Thumb instructions and DSP instruction sets.
 It has been used in digital mobile phones, personal digital assistants and network products.
 Xscale processor is an ARM microprocessor currently promoted by Intel.

ARM11: instruction set ARMv6, 8-stage pipeline, 1.25DMIPS/MHz

Cortex-A8: instruction set ARMv7-A, 13-stage integer pipeline, superscalar dual-issue, 2.0DMIPS/MHz, Neon as standard, does not support multi-core
Scorpion: instruction set ARMv7-A, designed by Qualcomm based on A8 after obtaining instruction set authorization. 13-stage integer pipeline, superscalar dual-issue, partial out-of-order execution, 2.1DMIPS/MHz, Neon as standard, supports multi-core
Cortex-A9: instruction set ARMv7-A, 8-stage integer pipeline, superscalar dual-issue, out-of-order execution, 2.5DMIPS/MHz, Neon/VFPv3 as optional, supports multi-core
Cortex-A5: instruction set ARMv7-A, 8-stage integer pipeline, 1.57DMIPS/MHz, Neon/VFPv3 as optional, supports multi-core

Cortex-A15: instruction set ARMv7-A, superscalar, out-of-order execution, optional Neon/VFPv4, multi-core support

  When using the ARM toolchain, there will be -march -mcpu etc.

-mcpu=

-mtune=

They specify the target processor (target ARM processor).

Optional parameters are: `arm2', `arm250', `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7', `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700', `arm700i', `arm710', `arm710c', `arm7100', `arm7500', `arm7500fe', `arm7tdmi', `arm7tdmi-s', `arm8', `strongarm', `strongarm110', `strongarm1100', `arm8', `arm810', `arm9', `arm9e', `arm920', `arm920t', `arm922t', `arm946e-s', `arm946e-s', `arm966e-s', `arm968e-s', `arm926ej-s', `arm940t', `arm9tdmi', `arm10tdmi', `arm1020t', `arm1026ej-s', `arm10e', `arm1020e', `arm1022e', `arm1136j-s', `arm1136jf-s', `mpcore', `mpcorenovfp', `arm1176jz-s', `arm1176jzf-s', `xscale', `iwmmxt', `ep9312'，Cortex-A8， Cortex-A9

-march=

  target ARM architecture. Target processor architecture.

 `armv2', `armv2a', `armv3', `armv3m', `armv4', `armv4t', `armv5', `armv5t', `armv5te', `armv6', `armv6j', `iwmmxt', `ep9312'. armv7-a, etc.

Thumb

Newer ARM processors have a 16-bit instruction mode called Thumb, probably because each conditionally-operated instruction consumes 4 bits. In Thumb mode, the smaller opcodes have less functionality. For example, only branches can be conditional, and many opcodes cannot access all of the CPU's registers. However, the shorter opcodes provide better coding density overall, even if some operations require more instructions. Especially in cases where the memory port or bus width is limited to 32, the shorter Thumb opcodes can use the limited memory bandwidth more efficiently, thus providing better performance than 32-bit code. Typical embedded hardware has only a small 32-bit datapath addressing range and other narrower 16 bits addressing (such as Game Boy Advance). In this case, it is usually practical to compile to Thumb code and optimize the CPU-specific program areas yourself using the (non-Thumb) 32-bit instruction set so that they can fit into the limited 32-bit bus width memory.