VFD implementation principle and drive design

A brief introduction to VFD

VFD refers to vacuum fluorescent display, which is the abbreviation of Vacuum Fluorescent Display. It uses electrons to hit the phosphor on the glass substrate to emit light. The combination of various bright spots on the VFD is used to illuminate characters, numbers, specific icons, etc. Due to the characteristics of VFD display, clear and bright, low power consumption, etc., it is widely used in household appliances, instruments and equipment, automatic equipment, etc., to display digital information such as temperature, character information such as: name and some marking indication information. There are many introductions on the Internet about the hardware structure and working principle of VFD. You can easily find a very accurate introduction on the official website. Please download the VFD principle and use on this site

Typical hardware circuit of VFD display in DVD player

The hardware circuit of the VFD can understand the segments and bits that need to be driven according to the SPEC of the VFD screen, and select the corresponding driver IC. Commonly used ones include PT6312 and PT6311. PT6311 can drive more segments and bits, and can connect more buttons. The parameters of the peripheral components of the driving circuit can refer to the SPEC of PT6311 and PT6312. It should be noted that 6312 and 6311 are universal for many brands. Drivers of different brands should pay attention to the difference in the resistance value of the oscillation resistor. The rest are basically the same. In addition, in the circuit semi-design, the decoupling capacitor of the driving voltage +5V should be as close to the IC as possible, and the driving data lines (DATA, STB, CLK) are each connected to a 101 tile to the ground to ensure that the IC and data lines are not interfered with or reduce interference.

Power supply of VFD display screen

The power supply of the VFD display includes the AC ~3V3 filament voltage and the -21V~-27V and +5V required by the driver chip. The figure above is a typical transformer secondary power supply processing circuit.
Another method is to use a DC inverter or a switching power supply. There are many special DVD switching power supplies on the market that meet the power supply requirements of DVD decoder boards and VFD displays. The power supply group includes: +5V, ±12V, -21V, ~3V3, and some also come with commonly used integrated amplifier power supplies, which are also very convenient to use. The TOPAV-2008 development platform designed by the author adopts the DC inverter AC power supply method for VFD. The structure is very simple and easy to use. For details, please visit the Microcontroller Audio Technology Network.

Software Control Drive Design of VFD

As mentioned earlier, VFD has a wide range of uses, so it is very necessary to figure out how to drive it through software. How to make VFD display the content we want to display is a problem that a programmer has to think about, and it is also the focus of this article. There are many electronic products on the market that use VFD, among which the popular digital TV, set-top box (DVB) and DVD all use VFD display. To make VFD work properly, it depends on a working platform, for example, whether you are working on Sunplus platform, Cheertek, Ali, ST, MTK, ESS and other platforms. It is very important to make the program work efficiently and have the greatest possible portability and scalability. For example, a VFD driver module can work on multiple platforms such as Sunplus, cheertek, Ali, and can also work on other microcontrollers as long as it supports C language programming. In order to make the entire module more modular, we need to further subdivide the entire module. Hey! Enough nonsense, too excited.

Three-step drive

We divide the VFD drive into three steps or three parts to achieve, and each part implements the corresponding function:

Step 1: Upper layer interface, used to adapt to different companies and types of VFDs on the market.
Step 2: Middle layer, the realization of each display function of VFD, to meet the display requirements. For example: general display, flashing, scrolling, rotation, etc.
Step 3: Platform interface, used to implement the interface between various platforms, mainly the communication with the CPU.
Based on the above concept, let's implement it step by step. 

Briefly introduce the implementation environment:

Compilation environment: GCC 

language: C 

Test platform: Cheertek (CT219, 909), and Ali (Ali3330, 3329) (DVB external display, used to display radio station names, etc.) 

VFD hardware: CS16312.

Step 1: Establish a universal interface: used to adapt to different companies and types of VFDs on the market 8-segment encoding Before starting to write a program implementation, first understand the principle of character display. Characters are displayed on the VFD according to the 8-segment encoding method. Of course, there are more segment encoding methods. 8-segment encoding uses one byte to describe an ASCII character. For extended ASCII codes such as German and French, more segment encoding is required, that is, multiple bytes are used to represent a character. 

In an eight-segment coded VFD, the eight segments are defined as a, b, c, d, e, f, g, and h, and are represented by a byte: 
hgfedcba 
, where h is the highest bit of the byte and a is the lowest bit of the byte.
The principle of displaying characters is as follows:

0x04 English: The writing of commonly used letters in VFD.
Please note the difference between the letter "米" 8 and 8. According to the above principle, 0 means off and 1 means on. It can be concluded that the corresponding encoding after the 8 segments are lit up is: 

Each of the 8 segments corresponds to a bit of a byte:

h : 1000 0000 ---> 0x80
g : 0100 0000 ---> 0x40
f : 0010 0000 ---> 0x20
e : 0001 0000 ---> 0x10
d : 0000 1000 ---> 0x08
c : 0000 0100 ---> 0x04
b : 0000 0010 ---> 0x02
a : 0000 0001 ---> 0x01According
to the above encoding of each segment, if you want to display the character 'A' It is necessary to light up segments a, b, c, e, f, and g at the same time and turn off segment d, so that the outline of a character 'A' will appear, such as the 'A' in "AbCd" in the figure above, so the code of the letter A is 0111 0111 That is, just add the codes of the corresponding segments to be lit up. The code value of 'A' = a|b|c|e|f|g The corresponding relationship between each segment is as follows: 

7 6 5 4 3 2 1 0 
hgfedcba 
0 1 1 1 0 1 1 1 

Through the above analysis, the following macros can be used in the program to redefine the 8 segments of VFD 

#define SEG_A 0x01
#define SEG_B 0x02
#define SEG_C 0x04
#define SEG_D 0x08
#define SEG_E 0x10
#define SEG_F 0x20
#define SEG_G 0x40
#define SEG_H 0x80
can be defined as the character 'A' through the above analysis and segment definition as follows:

#define CHAR_A SEG_A|SEG_B|SEG_C|SEG_E|SEG_F|SEG_G 

Based on the above analysis and definition, I can make complete definitions for 26 letters and 10 numeric characters as follows:

#define NUM_0 SEG_A|SEG_B|SEG_C|SEG_D|SEG_E|SEG_F
#define NUM_1 SEG_B|SEG_C
#define NUM_2 SEG_A|SEG_B|SEG_D|SEG_E|SEG_G
#define NUM_3 SEG_A|SEG_B|SEG_C|SEG_D|SEG_G
#define NUM_4 SEG_B|SEG_C|SEG_F|SEG_G
#define NUM_5 SEG_A|SEG_C|SEG_D|SEG_F|SEG_G
#define NUM_6 SEG_A|SEG_C|SEG_D|SEG_E|SEG_F|SEG_G
#define NUM_7 SEG_A|SEG_B|SEG_C
#define NUM_8 SEG_A|SEG_B|SEG_C|SEG_D|SEG_E|SEG_F|SEG_G
# NUM_9 SEG_A|SEG_B|SEG_C|SEG_D|SEG_F|SEG_G #define

CHAR_A SEG_A|SEG_B|SEG_C|SEG_E|SEG_F|SEG_G
#define CHAR_a CHAR_A 
#define CHAR_B SEG_C|SEG_D|SEG_E|SEG_F|SEG_G
#define CHAR_b CHAR_B
#define CHAR_c SEG_D|SEG_E|SEG_G
#define CHAR_C SEG_A|SEG_D|SEG_E|SEG_F
#define CHAR_d SEG_B|SEG_C|SEG_D|SEG_E|SEG_G
#define CHAR_D CHAR_d 
#define CHAR_E SEG_A|SEG_D|SEG_E|SEG_F|SEG_ G
#define CHAR_e CHAR_E
#define CHAR_F SEG_A|SEG_E|SEG_F|SEG_G 
#define CHAR_f CHAR_F 
#define CHAR_g NUM_9
#define CHAR_G NUM_9
#define CHAR_H SEG_B|SEG_C|SEG_E|SEG_F|SEG_G
#define CHAR_h CHAR_H
#define CHAR_I NUM_1
#define CHAR_i NUM_1
#define CHAR_L SEG_D|SEG_E|SEG_F
#define CHAR_l CHAR_L 
#define CHAR_N SEG_A|SEG_B|SEG_C|SEG_E|SEG_F
#define CHAR_n SEG_B|SEG_C|SEG_E|SEG_F|SEG_H
#define CHAR_O NUM_0
#define CHAR_o SEG_C|SEG_D|SEG_E|SEG_G
#define CHAR_P SEG_A|SEG_B|SEG_E|SEG_F|SEG_G
#define CHAR_p LETT_P
#define CHAR_r SEG_E|SEG_G
#define CHAR_R CHAR_r
#define CHAR_S SEG_A|SEG_C|SEG_D|SEG_F|SEG_G
#define CHAR_t SEG_D|SEG_E|SEG_F|SEG_G
#define CHAR_T LETT_t
#define CHAR_U SEG_B|SEG_C|SEG_D|SEG_E|SEG_F
#define CHAR_Y SEG_B|SEG_C|SEG_D|SEG_F|SEG_G
#define CHAR_G SEG_G 
#define CHAR_BLANK 0x00 
The above defines the encodings for basic characters and numbers. In the future, these characters can be referred to by encoding. For example, a string "Hello world" is equal to CHAR_H+CHAR_e+CHAR_l+CHAR_l+CHAR_BLANK+CHAR_w+CHAR_O 

CHAR_r+CHAR_l+CHAR_d. 
Expressed as an array:

char str_hw[11]={CHAR_H,CHAR_e,CHAR_l,CHAR_l,CHAR_BLANK,CHAR_w,CHAR_O 
CHAR_r, CHAR_l, CHAR_d}; 

Display principle

So far, we have only logically encoded basic characters and numbers, and how to generate a string. These are just the beginning. There is still a lot to do to display "hello world" on the VFD. Next, we need to understand how VFD displays characters.
VFD needs to display characters through a VFD driver chip. VFD itself can only display like a computer monitor. If you want it to display content, you need to use the driver chip and peripheral driver circuits to complete the display task. In DVB, DVB and other electronic products that use VFD, there will be a VFD circuit board, usually called VFD panel or front panel. This circuit board is composed of VFD driver chip, peripheral driver circuit and VFD. There are many types of VFD driver chips in the current market, but the standards are the same. VFD is connected to the driver chip through the driver circuit to complete the display task of the driver chip, and the task of the driver chip is obtained through the platform system (such as Ali's 3329 main chip). In the actual programming process, it is only necessary to control the driver chip on the VFD board through the main chip (CPU) on the platform system to complete a display task or other tasks. The main chip (CPU) on the platform system is generally connected to the VFD driver chip through a standard three-wire serial port. The above briefly introduces the relationship between the motherboard CPU, driver chip and VFD. The specific details can be found in the corresponding DATA SHEET or spec., or you can see the detailed circuit connection status from the hardware engineer, and you will have a deeper understanding of the coordinated work. Oh! I have been verbose again. 

The internal block diagram of the VFD driver chip (16312) is as follows: 

In the block diagram above, we can see that a display RAM realizes the display function through this display register. One byte in the display register can describe one character, and one bit in the display register is mapped to a bright spot on the VFD display screen. That is to say, if you write 1 to a mapped bit in the display register, the corresponding bright spot in the VFD display screen will be lit, and vice versa, if you write 0, the corresponding bright spot in the VFD display screen will be extinguished. By writing one byte to the display register, a basic character can be displayed, and writing several bytes can display a string. The display register leads out the pins outside the chip through the segments and then connects to the VFD. The mapping of the display register to the VFD can be realized through hardware connection. Usually, since the various pins of the driver chip can be selected according to their own needs, the connection of the line will have slight changes, which makes the specific addresses of the VFD's bright spots mapped to the display registers also have some slight differences. If you want to start displaying an arbitrary string at any position on the VFD and light up any point on the VFD, the programmer must know and calculate what address bit in the display register each bright spot on the VFD is mapped to on a certain VFD driver board, so as to decide what address to write data to the display register. Therefore, define the address of each bright spot on the VFD in the DISPLAY RAM. From right to left, all bright spots on the VFD are composed of several 8 segments and icons: For example: 

The following N1_ represents the first 8 segments

#define N1_SEG_A_ADDR 0x02 
#define N1_SEG_A_DATA 0x04 
//The above definition means:
//1. A in 8 segments The byte address of the segment in the display register is the byte // of the display memory to which this bright spot is mapped (for example, 0x02 is the second byte).

//2. The A segment is mapped to the bit number of a byte in the display register (for example, 0x04 is the third bit in the 8 bits of 0000 0100 
, that is, the bit set to 1)
//The above definition describes that, from left to right, the A segment in the first 8 segments of the VFD 
is mapped to the third bit in the second byte of the display register, that is, if the third bit in the second byte of the display register is set to 
1, then the A segment in the first 8 segments of the VFD will be lit, that is, write N1_SEG_A_DATA to the N1_SEG_A_ADDR address in the display register.

//The following can define the bright spots and icons on the VFD in turn.
//Note: As for where the macro-defined values ​​(such as: 0x02, 0x04) come from, it will be discussed later. In fact, it is necessary to write a program // to test the corresponding addresses of each bright spot, or get it from the relevant SPEC. After the drive is completed, just add the values ​​for different VFDs.

#define N1_SEG_B_ADDR 0x02
#define N1_SEG_B_DATA 0x08 #define

N1_SEG_C_ADDR 0x02 #define N1_SEG_C_DATA 0x40 #define N1_SEG_D_ADDR 0x03 #define N1_SEG_D_DATA 0x08 #define N1_SEG_E_ADDR 0 x03 #define N1_SEG_E_DATA 0x04 #define N1_SEG_F_ADDR 0x03 #define N1_SEG_F_DATA 0x40 #define N1_SEG_G_ADDR 0x03 #define N1_SEG_G_DATA 0x30 #define N1_SEG_H_ADDR 0x00 #define N1_SEG_H_DATA 0x00 ............................ // Icon Define #define VFD_TITLE_ADDR 0x00 #define VFD_TITLE 0x00 #define VFD_CHAPTER_ADDR 0x00 #define VFD_CHAPTER 0x00 #define VFD_HOUR_ADDR 0x00 #define VFD_HOUR 0x00 #define VFD_HOUR_COL_ADDR 0x02 #define VFD_HOUR_COL 0x01 ............................... The above defines the various bright spots on the VFD, but we also need to establish a mapping table to facilitate the calling of each segment definition.  BYTE ADDRESS_MAP PIN G[] = { N1_SEG_A_ADDR, N1_SEG_B_ADDR, N1_SEG_C_ADDR, N1_SEG_D_ADDR,N1_SEG_E_ADDR, N1_SEG_F_ADDR,  N1_SEG_G_ADDR,0, N1_SEG_A_DATA, N1_SEG_B_DATA, N1_SEG_C_DATA, N1_SEG_D_DATA,N1_SEG_E_DATA,  N1_SEG_F_DATA,N1_SEG_G_DATA,0, ................. ................. }; According to the three-part driver design idea, we divide the communication between the VFD driver chip and the CPU through the serial interface into the third part of the entire driver design. The first step is to establish a common interface that is logically independent of hardware. Based on the above analysis of the display register, we can create an array to map the display register in the driver chip. The above 16 X 11 display memory can display 22 bytes, so we can make the following definition:  BYTE 16312_DisplayRam[22];  Step 2: Middle layer: Implementation of various display functions of VFD to meet display requirements.


















































In this part, various display functions of VFD are realized based on the public interface of the first layer and the driver of the third layer. Therefore, this part mainly calls the driver function of the third layer to process the data of the first layer, or sends the information of the first layer to the VFD driver chip through the third layer according to the display requirements. For a VFD, it must first have the basic display function of a piece of information. The following will introduce how to display a string "Hello world". In order to fully display this string at the same time, first of all, there must be 11 8-segments on the VFD, that is, the hardware supports the display of 11 characters at the same time. If it is not enough, the following characters will be lost. 

Implement a process to parse the string into 16312_DisplayRam. 

void ParseStringToRamMapping(char *Str,BYTE Strcount)
{
BYTE i,j;
for(i=0;ifor(j=0;j<8;j++) 
{ 
if(Str[i+1] & (0x01 << j)) 
16312_DisplayRam[ ADDRESS_MAPPING[i*16+j] ] |= ADDRESS_MAPPING[i*16+8+j]; 
else 
16312_DisplayRam[ ADDRESS_MAPPING[i*16+j] ] &= ~ADDRESS_MAPPING[i*16+8+j]; 
}
}
}

//Get the information currently displayed on the VFD
void ParseRamMappingToString()
{

}
//Parse "Hello world" into 16312_DisplayRam.
ParseStringToRamMapping(str_hw,11);

//Write 16312_DisplayRam to the VFD RAM.
Write_Datas(16312_DisplayRam,NULL,22);
When the main program is polling, call the Write_Datas method to finally write 16312_DisplayRam to the display RAM of the VFD driver chip, and then call Start_VFD(); "Hello world" will be displayed on the VFD. 

The content in the second layer is mainly the realization of the display function and the logic control. The program can be written flexibly according to actual needs, while the content of the first and third parts is relatively stable. Therefore, you can also implement a function similar to the following to control the VFD display in real time: 

void ShowMessagesOnVFD(char *Str,BYTE Strcount)
{
ParseStringToRamMapping(Str, Strcount);
Write_Datas(16312_DisplayRam,NULL,22);
Start_VFD();
}
or
void PrintMessagesOnVFD(char *Str,BYTE Strcount)
{
ParseStringToRamMapping(Str, Strcount);
Write_Datas(16312_DisplayRam,NULL,22);
Start_VFD();
}

Step 3: Platform interface: used to realize the interface between each platform, mainly the communication with the CPU.
In the third part, the main problem of communication between the CPU and the VFD driver chip through the serial interface is realized.
The CPU controls the closing and display of the VFD, the brightness of the VFD, the reading and writing of the display memory, the key scanning, etc. through the serial interface. As can be seen in the figure above, the serial port has four lines, STB, CLK, Din, and Dout, but in the actual circuit, Din and Dout are connected together for use, so it is also called a three-wire serial port. 

STB: The chip select signal line initializes the serial interface on the rising or falling edge and then waits for
the first byte after receiving the instruction STB is low as the instruction. When
processing the instruction, other current processing is terminated. When STB is high
, CLK is ignored.

CLK: Clock signal line. Read serial data on the rising edge and output data on the falling edge.
Din: Data input.
Dout: Data output.
Serial communication and GPIO 

Understand the IO port used by VFD, through the circuit diagram of a whole machine, or use a multimeter to measure the pins on the CPU connected to the VFD serial interface from the PCB board, and then get the mapped IO interface according to the CPU SPEC. The complete name should be GPIO (General Purpose Input/Output, which supports I2C, serial bus and other protocols). 

Such as: Ali 3330
#define GPIO_VFD_STB 17
#define GPIO_VFD_SDA 22 //Din and Dout
#define GPIO_VFD_CLK 16 

The above definition can be understood as: VFD STB is connected to IO 17 on the motherboard CPU
VFD SDA is connected to IO 22 on the motherboard CPU
VFD CLK is connected to IO 16 on the motherboard CPU
After knowing the IO used for the connection, you can send receipt and control information to the VFD driver chip through the VFD serial interface, and read and write data to the display register and key scan register. However, first of all, you must be able to control each IO interface through software, that is, you can set the potential of each GIO through software, for example: pull GPIO 17 up to +5 volts, or pull it down to -5 volts. If there is a certain platform system, the corresponding platform will provide the corresponding GPIO operation interface, 

such as Cheertek909
HAL_WriteGPIO(GPIO_VFD_STB,1); // to PGIO 17 Write 1 to output high potential
HAL_WriteGPIO(GPIO_VFD_STB,0); //Write 0 to PGIO 17 to output low potential
HAL_ReadGPIO(GPIO_VFD_SDA)?1:0; //Read GPIO

Ali3330

#define HAL_GPIO_BIT_SET(pos, val) \
do {osal_interrupt_d ISA ble(); \
((pos < 32) \
? HAL_GPIO_WRITE((HAL_GPIO_READ() & ~(1 << (pos))) | ((val) << (pos))) \
: HAL_GPIO1_WRITE((HAL_GPIO1_READ() & ~(1 << (pos - 32))) | ((val) << (pos - 32)))); \
osal_interrupt_enable(); \
} while (0)

If there is no completed platform system and no GPIO interface, it is necessary to first implement the GPIO input and output subroutines according to the CPU SPEC. This part of the program varies depending on the main IC and is not the focus of this article. 

For example: Cheertek909

void HAL_WriteGPIO(BYTE bGroup, DWORD dwPort, BYTE bValue)
{
.............
dwDesiredPort = (dwDesiredPort << 8);
.............
REG_PLAT_GPA_IO_DIR_CONTROL &= ~(dwDesiredPort);
............
}
// 909S: define GPIO registers
#define REG_PLATFO RM_GPIO_BASE (IO_START+0x330) 
// 80000330
#define REG_PLAT_GPA_CLEAR (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x00))) // 
0330 (909S)
#define REG_PLAT_GPA_SET (*((volatile DWORD *) (REG_PLATFORM_GP IO_BASE+0x04))) // 
0334 (909S)
#define REG_PLAT_GPA_IO_DIR_CONTROL (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x08))) // 
0338 (909S)
#define REG_PLAT_GPIO_INT_CONFIGURATION (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+ 0x0c))) // 
033c
#define REG_PLAT_GPCDE_CLEAR (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x10))) // 
0340 (909S)
#define REG_PLAT_GPCDE_SET (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x14))) // 
0344 (909S)
#define REG_PLAT_GPCDE_IO_DIR_CONTROL (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x18))) // 
0348 (909S)
#define REG_PLAT_GPF_CLEAR (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x1c))) // 
034c (909S) #define REG_PLAT_GPF_SET (*((volatile DWORD * 
) (REG_PLATFORM_GPIO_BASE+0x20))) // 
0360 (909S) #Define ALI_SET_GPIO_HEIGHT(GPIO) \ HAL_GPIO_BIT_SET(GPIO,1) #Define ALI_SET_GPIO_LOW(GPIO) \ HAL_GPIO_BIT_SET(GPIO,0) Next, we can test the above code. We can output high and low potentials to the three GPIOs respectively, and then use an oscilloscope to observe the waveforms to see if they are correct. If it works properly, we can then implement data transmission according to the serial protocol. There are two main functions: transmitting one binary bit at a time, i.e. one BIT, and transmitting one byte at a time. 

As can be seen from the figure, according to the serial protocol, STB is used to select at the beginning of transmission, so that STB enters a low potential state, indicating that the serial port data transmission has started, CLK is valid, the data on SDA is effective, it is a high potential, the transmission ends SDA, SDA is invalid, when STB changes from a low potential to a high potential, SDA transmits one or more bytes, when SCK is a high potential, that is, when it rises, SDA receives data, that is, the CPU writes data to the VFD  Chip  DRIVER, and SDA transmits a BIT. The STB control signal controls the transmission of bytes, and the SCK clock signal controls the transmission of bits. One STB cycle transmits one or more bytes, and one CLK cycle is a read and write signal for a BIT. Based on the above analysis, we can write the following code: 

Write a bit:
ALI_SET_GPIO_LOW(GPIO_VFD_CLK);
ALI_SET_GPIO_HEIGHT(GPIO_VFD_SDA);
ALI_SET_GPIO_HEIGHT(GPIO_VFD_CLK);

Write a byte:

void Write_OneByte(BYTE bValue)
{
BYTE i=0;
ALI_SET_GPIO_LOW(GPIO_VFD_STB); //Transfer multiple bytes, STB control is moved outside the function, that is, the transmission

//is not terminated.
for(i=0;i<8;i++)
{
ALI_SET_GPIO_LOW(GPIO_VFD_CLK);
if(bValue & 0x01)
ALI_SET_GPIO_HEIGHT(GPIO_VFD_SDA);
else
ALI_SET_GPIO_Low(GPIO_VFD_SDA);

ALI_SET_GPIO_HEIGHT(GPIO_VFD_CLK);
bValue>>=1;
}
ALI_ SET_GPIO_HEIGHT(GPIO_VFD_STB); //Transmit multiple bytes, STB control is moved outside the function.

}

Transfer multiple bytes at one time:
void Write_Datas(BYTE bcount,BYTE *pBValue)
{
BYTE i;
ALI_SET_GPIO_LOW(GPIO_VFD_STB); 
for(i=0;i {
Write_OneByte(pBValue[bcount]);

}
ALI_SET_GPIO_HEIGHT(GPIO_VFD_STB);
}
The above code implements how to transmit data according to the serial port protocol, that is, the process of sending data to the serial port, but this is not a complete transmission process. A complete data transmission process should be that a specific data block is transmitted from one place to a specified place. Generally, data is transmitted from a register in a chip to another register or from one place in the RAM to another place, and from different registers in different chips to each other. The most commonly used communication protocol is the I2C protocol. The focus here is the serial port protocol. No matter what protocol is used, you need to know the destination address, which can be obtained from the relevant chip SPEC. In the serial protocol, a rising or falling edge of STB initializes the serial interface. When STB is low, CLK is valid, SDA starts to receive data and the first byte is the instruction. The definitions of the 16312 commands are as follows:

#define COMMAND_WRITEDISPLAY 0x40

#define COMMAND_READKEY 0x42

#define COMMAND_ADDRESS 0xc0 

#define COMMAND_DISP_MODE 0x02

#define COMMAND_ CTR L_MODE 0x8f 

//Rewrite the above function
void Write_Datas(BYTE *pSour,BYTE *pDest,BYTE bcount)
{
BYTE i;
ALI_SET_GPIO_LOW(GPIO_VFD_STB); //If it is already at the falling edge, remove
Write_OneByte(COMMAND_WRITEDISPLAY);
ALI_SET_GPIO_HEIGHT(GPIO_VFD_STB);
for(i=0;i<4;i++){}
ALI_SET_GPIO_LOW(GPIO_VFD_STB); //If already at the falling edge, remove
Write_OneByte(COMMAND_ADDRESS); //Parameters can also be obtained from pDest
ALI_SET_GPIO_HEIGHT(GPIO_VFD_STB);
for(i=0;i<4;i++){}
ALI_SET_GPIO_LOW(GPIO_VFD_STB); 
for(i=0;i {
Write_OneByte(pBValue[bcount]);

}
ALI_SET_GPIO_HEIGHT(GPIO_VFD_STB);
for(i=0;i<4;i++){}
} 
//Set VFD working mode, and turn on VFD.
void Start_VFD(void)
{
BYTE i;
ALI_SET_GPIO_LOW(GPIO_VFD_STB); //If already at falling edge, remove
Write_OneByte(COMMAND_DISP_MODE);
ALI_SET_GPIO_HEIGHT(GPIO_VFD_STB);
for(i=0;i<4;i++){}

ALI_SET_GPIO_LOW(GPIO_VFD_STB); //If it is already on the falling edge, remove
Write_OneByte(COMMAND_DISP_MODE);
ALI_SET_GPIO_HEIGHT(COMMAND_CTRL_MODE);
for(i=0;i<4;i++){}

}
Up to now, we have basically realized some basic functions of serial communication, mainly sending data to the serial port. Next, we will realize how to receive data from the serial bus. In addition, various display functions related to VFD will be realized in the second part.