Interrupt system control register and interrupt program example

The interrupt system has two control registers, IE and IP, which are used to set the on/off and interrupt priority of each interrupt source. In addition, there are 4 bits in TCON that are used to select the conditions that cause external interrupts and serve as flag bits.

1. Interrupt Enable Register - IE
IE is in the special function register, the byte address is A8H, and the bit address (from low to high) is A8H-AFH.
IE is used to turn on or off the interrupt request of each interrupt source. The basic format is shown in Figure 2 below:

Picture 1

EA: Global interrupt enable bit. EA=0, turn off all interrupts; EA=1, turn on global interrupt control. Under this condition, the corresponding interrupt is turned on or off by each interrupt control bit.
×: Invalid bit.
ES: Serial I/O interrupt enable bit. ES=1, turn on serial I/O interrupt; ES=0, turn off serial I/O interrupt.
ETl; Timer/Counter 1 interrupt enable bit. ETl=1, turn on T1 interrupt; ETl=0, turn off T1 interrupt.
EXl: External interrupt 1 interrupt enable bit. EXl=1, turn on INT1; EXl=0, turn off INT1.
ET0: Timer/Counter 0 interrupt enable bit. ET0=1, turn on T0 interrupt; ET0=0, turn off TO interrupt.
EXO: External interrupt 0 interrupt enable bit. Ex0=1, turn on INT0; EX0=0, turn off INT0.

Interrupt priority register -- IP:
IP is in the special function register, the byte address is B8H, the bit address (from low to high) is B8H to BFH, IP is used to set which level of the two-level interrupt each interrupt source belongs to. The basic format of IP is shown in Figure 3 below:

Picture 1

×: Invalid bit.
PS: Serial I/O interrupt priority control bit. PS=1, high priority; PS=0, low priority.
PTl: Timer/Counter 1 interrupt priority control bit. PTl=1, high priority; PTl=0, low priority.
Pxl: External interrupt 1 interrupt priority control bit. Pxl=1, high priority; PXl=0, low priority.
PT0: Timer/Counter o interrupt priority control bit. PT0=1, high priority; PTO=0, low priority.
Px0: External interrupt 0 interrupt priority control bit. Px0=1, high priority; Px0=0, low priority.
In the MCS-51 microcontroller series, high-level interrupts can interrupt low-level interrupts to form interrupt nesting; interrupt nesting cannot be formed between interrupts of the same level, or between low-level interrupts and high-level interrupts. If several interrupts of the same level request interrupt responses from the CPU at the same time, the CPU determines the order of response in the following order:

INT0=T0---INT1=T1=RI/T1.

Interrupt response process 

If an interrupt source is programmed and is in an open state, and meets the conditions for interrupt response, and ① the currently executed instruction has been executed
1, the same level or high level interrupt is not currently responded to
2, and the IE, IP interrupt control register is not being operated or the REH instruction is being executed, then the microcontroller responds to this interrupt.
Under normal circumstances, it usually takes 3 to 8 machine cycles from the effective interrupt request signal to the interrupt being responded to. After the interrupt is responded to, the interrupt request flag is automatically cleared (the interrupt flag of the serial I/O port must be cleared by software), and the breakpoint, that is, the value of the program counter (PC), is pushed into the stack (for recovery); then the corresponding interrupt entry address is loaded into the PC, so that the program is transferred to the corresponding interrupt service program for execution.
The interrupt entry addresses of each interrupt source in the program memory are as follows:
Interrupt source entry address
INT0 (external interrupt 0) 0003H
TF0 (TO interrupt) 000BH
INT1 (external interrupt 1) 0013H
TF1 (T1 interrupt) 001BH
RI/TI (serial port interrupt) 0023H
Since the interrupt entry addresses are very close to each other, it is not convenient to store each long interrupt service program. Therefore, a transfer instruction is usually arranged in the second or third unit starting from the interrupt entry address to transfer to the interrupt service program arranged there. Taking T1 interrupt as an example, the process is shown in Figure 4.
Since the five interrupt sources each have their interrupt request flags 0, TF0, IEl, TF1 and RI/TI, when the interrupt source meets the interrupt request condition, each flag is automatically set to 1 to request an interrupt to the CPU. If the CPU cannot respond immediately after an interrupt source makes an interrupt request, the interrupt request status will remain until the CPU responds to the interrupt as long as the interrupt request flag is not cleared manually by the software. For serial port interrupts, this process is different from the other four interrupts in that even if the CPU responds to the interrupt, the interrupt flag RI/TI will not be cleared automatically. The interrupt request will only be made again after the instruction to clear RI/TI is set in the interrupt service program.

The CPU's on-site protection and recovery must be completed by the corresponding interrupt service program that is responded to. When the RETI interrupt return instruction is executed, the breakpoint value is automatically popped from the top 2 bytes of the stack and loaded into the PC register, so that the CPU continues to execute the interrupted program.
The following is an example of applying a timer interrupt.
Now it is required to compile a program to make the P1.0 port line output a square wave pulse with a period of 2ms. Assume that the single-chip crystal oscillator frequency
Fosc = 6MHZ.
1. Method: Use timer T0 for 1ms timing, and cause an interrupt after reaching the timing value. In the interrupt service program, the state of P1.0 is reversed once, and the timing is set for 1ms again.
2. Timing initial value: machine cycle MC = 12/fosc = 2us. Therefore, the number of machine cycles required for timing 1ms is 500D, that is, 0lF4H. Assume that T0 is working mode 1 (16-bit mode), then the timing initial value is (01F4H) complement = FEOCH

Picture 1

Serial port control registers:

The serial port has two control registers, SCON and PCON, which are used to set the serial port's working mode, the operating status of receiving/sending, the characteristics of receiving/sending data, the size of the baud rate, and the interrupt flag of the operation.
① Serial port control register SCON
The byte address of SCON is 98H, and the bit address (from low to high) is 98H to 9FH. The format of SCON is shown in Figure 5.

Picture 1

SMo, SM1:
Serial port working mode control bit.
00--mode 0; 01--mode 1;
10--mode 2; 11--mode 3.
SM2:
Multi-machine communication control bit used only for mode 2 and mode 3.
Transmitter SM2 = 1 (requires program control setting).
When it is mode 2 or mode 3:
When receiver SM2 = 1, if RB8 = 1, it can cause serial reception interruption; if RB8 = 0, it will not
cause serial reception interruption. When SM2 = 0, if RB8 = 1, it can cause serial reception interruption; if
RB8 = 0, it can also cause serial reception interruption.
REN:
Serial reception enable bit.
0--reception is prohibited; 1--reception is allowed.
TB8:
In mode 2 and 3, TB8 is the 9th data to be sent by the transmitter.
RB8:
In mode 2 and 3, RB8 is the 9th data received by the receiver, which just comes
from TB8 of the transmitter.
TI:
Transmit interrupt flag bit. Before sending, it must be cleared by software. During the sending process, TI remains at zero level.
After a frame of data is sent, it is automatically set to 1 by hardware. If you want to send again, you must clear it again by software.
RI:
Receive interrupt flag. Before receiving, it must be cleared by software. During the receiving process, RI remains at zero
level. After a frame of data is received, it is automatically set to 1 by the on-chip hardware. If you want to receive again, you must clear it again by software.

Reset to zero. 

Power Control Register PCON

The byte address of PCON is 87H, with no bit address. The format of PCON is shown in Figure 6. It should be noted that for the 80C31 microcontroller, PCON has several valid control bits.

SMOD: Baud rate doubling bit. When calculating the baud rate of serial modes 1, 2, and 3; 0: no doubling; 1: double. 

Application features of serial interrupt:

The serial I/O port of the 8031 ​​microcontroller is an interrupt source with two interrupt flags, RI and TI. RI is used for receiving, and TI is used for sending.
Regardless of the working mode of the serial port, TI/RI must be cleared before sending/receiving. When a frame of data is sent/received, TI/RI is automatically set to 1. If you want to send/receive again, you must clear it by software first.
Under the condition that the serial interrupt is turned on, for mode 0 and mode 1, after a frame of data is sent/received, in addition to setting TI/RI, it will also cause a serial interrupt request and execute the serial service program. However, for the receiver of mode 2 and mode 3, it depends on the status of SM2 and RB8 to determine whether RI is set and the opening of the serial interrupt:
SM2 RB8 Receiver interrupt flag and interrupt status
0 1 Activate RI, cause interrupt
1 0 Do not activate RI, do not cause interrupt
1 1 Activate RI, cause interrupt
The microcontroller uses this feature of mode 2 and 3 to realize communication between multiple machines. For common application methods of serial ports, please refer to the relevant chapters. 

Determination of baud rate:

For mode 0, the baud rate is fixed to fosc/12. The baud rate varies with the frequency of the external crystal oscillator. Commonly used fosc are 12MHz and 6MHz, so the baud rate is 1000×103 and 500×103 bit/s respectively. In this mode, data will be automatically sent/received at a fixed baud rate without any setting.
For mode 2, the baud rate is calculated as 2SMOD·fosc/64. When SMOD=0, the baud rate is fm/64; when SMOD=1, the baud rate is fosc/32. In this mode, after the program controls the state of the SMOD bit, the baud rate is determined and no other settings are required.
For mode 1 and mode 3, the baud rate is calculated as 2SMOD/32×T1 overflow rate. According to the different SMOD status bits, the baud rate has two types: Tl/32 overflow rate and T1/16 overflow rate. Since the setting of the T1 overflow rate is convenient, the choice of baud rate will be very flexible.
As mentioned before, timer T1 has 4 working modes. In order to obtain its overflow rate without entering the interrupt service program, T1 is often set to the operating state of working mode 2, that is, the mode of automatically adding 8-bit time constant. In this mode, the overflow rate (times/second) of T1 can be expressed as:

Picture 1

The following main program and interrupt service program are examples of using serial mode l to send a piece of data serially in a continuous and increasing manner starting from data 00H. Assume that the frequency of the microcontroller crystal oscillator is 6MHZ and the baud rate is 1200 bits/second.