S3C6410 pure bare metal boot, self-written SD BOOT boot

Publisher:WanderlustHeartLatest update time:2017-02-26 Source: eefocusKeywords:S3C6410 Reading articles on mobile phones Scan QR code
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In the past few nights, I have been tossing the bare metal SD card boot of S3C6410. I don't want to use UBOOT. I am a hardware developer and I am very interested in the bottom layer. I don't like the ones that are already written, so I have been trying it myself. In fact, I tried SD card boot a long time ago, that is, after ARM11 is powered on, it will copy the 8KB starting from the 9th KB from the bottom of the SD card (the offset of 0x2400B from the bottom) to the internal SRAM for execution. This is relatively simple, but the code size is only 8K, which cannot be played like STM32. Therefore, I consulted relevant information and learned that the boot method is L0 loading L1, and L1 loading L2. In short, after power-on, the L0 code solidified in the S3C6410 is started, and the external memory such as NAND and SD card is loaded. The memory is mapped or copied to the internal SRAM. The code copied from the SD card or flash is called L1, which is the user's boot code. On the computer, it is equivalent to the boot code and BIOS of the hard disk primary partition. It is used to initialize the external clock and peripherals and start the system. This part of the code is only 8KB, so the work completed is limited. Therefore, this code can be used to complete the initialization and copy the operating system or larger code to the memory. This part of the code is L2. Only after L1 initializes the memory can the memory be used. Before that, the memory is only 8KB, which is the internal SRAM. When starting from the SD card, it is mapped to 0x0c000000. From NAND, it can be 0 or 0x0c000000.

Currently only L1 is implemented, no uboot is needed, just need to burn to the specified location of SD card, and the development board needs to be selected as SD card boot.


The startup code completes the operations of turning off the watchdog, initializing the clock, SDRAM memory, stack, VIC, interrupt, etc. (The startup code comes from the Internet)


  1.     INCLUDE S3C6410.inc  

  2.     PRESERVE8  

  3.     AREA Init, CODE, READONLY  

  4. STACK_BASEADDRESS EQU 0x0c000400;0x52000000  

  5.   

  6. SVCStack EQU (STACK_BASEADDRESS); Management mode  

  7. UndefStack EQU (STACK_BASEADDRESS - 0x300); instruction termination mode  

  8. AbortStack EQU (STACK_BASEADDRESS - 0x300); data access termination mode  

  9. IRQStack EQU (STACK_BASEADDRESS - 0x200); interrupt mode  

  10. FIQStack EQU (STACK_BASEADDRESS - 0x100); Fast interrupt mode   

  11.       

  12. ;---------------------------  

  13. ; CPSR Mode Bit Definition  

  14. ;---------------------------  

  15. Mode_USR EQU (0x10)  

  16. Mode_FIQ EQU (0x11)  

  17. Mode_IRQ EQU (0x12)  

  18. Mode_SVC EQU (0x13)  

  19. Mode_ABT EQU (0x17)  

  20. Mode_UND EQU (0x1B)  

  21. Mode_SYS EQU (0x1F)  

  22. Mode_MASK EQU (0x1F)  

  23. NOINT EQU (0xC0)  

  24. I_Bit EQU (0x80)  

  25. F_Bit EQU (0x40)    

  26.       

  27.   

  28.       

  29.       

  30. ;Exception handling function    

  31. ;------------------------------------------------- --------------------------------------------------      

  32.     IMPORT main  

  33.     EXPORT ResetHandler  

  34.       

  35. ResetHandler  

  36.     ldr r0, =0x70000013; Base Addresses: 0x70000000, Size: 256 MB (0x13)  

  37.     mcr p15,0,r0,c15,c2,4 ; Tell the CPU the base address and address space of the peripheral registers. Important  

  38. ; Set to SVC mode  

  39.     MRS R0,CPSR  

  40.     BIC R0,R0,#0x1F  

  41.     ORR R0,R0,#0xD3  

  42.     MSR CPSR_cxsf,R0  

  43.   

  44.   

  45.   

  46. ; Unknown mode stack  

  47.         mrs r0,cpsr  

  48.         bic r0,r0,#Mode_MASK  

  49.         orr r1,r0,#Mode_UND|NOINT  

  50.         msr cpsr_cxsf,r1 ;UndefMode  

  51.         ldr sp,=UndefStack    

  52.   

  53.         ;Exception mode stack  

  54.         orr r1,r0,#Mode_ABT|NOINT  

  55.         msr cpsr_cxsf,r1 ;AbortMode  

  56.         ldr sp,=AbortStack    

  57.   

  58.         ;Interrupt mode stack  

  59.         orr r1,r0,#Mode_IRQ|NOINT  

  60.         msr cpsr_cxsf,r1 ;IRQMode  

  61.         ldr sp,=IRQStack      

  62.   

  63.         ; Manage mode stack  

  64.         bic r0,r0,#Mode_MASK|NOINT  

  65.         orr r1,r0,#Mode_SVC  

  66.         msr cpsr_cxsf,r1 ;SVCMode  

  67.         ldr sp,=SVCStack  

  68.           

  69. ; Disable watchdog  

  70.     LDR R0,=rWTCON  

  71.     LDR R1,=0x0  

  72.     STR R1,[R0]  

  73. ; Disable cache and mmu      

  74.       

  75.     LDR R0,=0x0  

  76.     MRC p15,0,R0,c1,c0,0  

  77.     LDR R1,=0xFFFF  

  78.     BIC R0,R0,R1  

  79.     MCR p15,0,R0,c1,c0,0  

  80.           

  81.       

  82. ; Disable all interrupts  

  83.   

  84.     LDR R0,=rVIC0INTENCLEAR   

  85.     LDR R1,=0xFFFFFFFF  

  86.     STR R1,[R0]  

  87.       

  88.     LDR R0,=rVIC1INTENCLEAR   

  89.     LDR R1,=0xFFFFFFFF  

  90.     STR R1,[R0]  

  91. ;------------------------------------------------- --------------------------------------------------      

  92.   

  93. ; Set the clock source  

  94.     LDR R0,=rOTHERS  

  95.     LDR R1,[R0]  

  96.     ORR R1,R1,#(1<<6)  

  97.       

  98.     LDR R0,=rCLK_SRC  

  99.     LDR R1,=(1<<13)|7  

  100.     STR R1,[R0]  

  101.   

  102.     LDR R0,=rCLK_SRC2  

  103.     LDR R1,=0x0  

  104.     STR R1,[R0]  

  105.       

  106. ; Set the clock division  

  107.     LDR R0,=rCLK_DIV0  

  108.     LDR R1,=0x01043310  

  109.     STR R1,[R0]  

  110.       

  111.     LDR R0,=rCLK_DIV1  

  112.     LDR R1,=0x0  

  113.     STR R1,[R0]  

  114.   

  115.     LDR R0,=rCLK_DIV2  

  116.     LDR R1,=3<<16  

  117.     STR R1,[R0]  

  118.                   

  119.       

  120. ; Enable clock  

  121.     LDR R0,=rHCLK_GATE  

  122.     LDR R1,=0xFFFFFFFF  

  123.     STR R1,[R0]  

  124.       

  125.     LDR R0,=rPCLK_GATE  

  126.     STR R1,[R0]  

  127.       

  128.     LDR R0,=rSCLK_GATE  

  129.     STR R1,[R0]  

  130.       

  131. ; Set the system clock   

  132. ; Set APLL 532MHz  

  133.     LDR R0,=rAPLL_LOCK  

  134.     LDR R1,=0xFFFF  

  135.     STR R1,[R0]  

  136.       

  137.     LDR R0,=rAPLL_CON  

  138.     LDR R1,=(1<<31)|(266<<16)|(3<<8)|(1)    

  139.     STR R1,[R0]  

  140.   

  141. ; Set MPLL 532MHz  

  142.     LDR R0,=rMPLL_LOCK  

  143.     LDR R1,=0xFFFF  

  144.     STR R1,[R0]  

  145.       

  146.     LDR R0,=rMPLL_CON  

  147.     LDR R1,=(1<<31)|(266<<16)|(3<<8)|(1)    

  148.     STR R1,[R0]  

  149.       

  150. ; Set EPLL 96MHz  

  151.     LDR R0,=rEPLL_LOCK  

  152.     LDR R1,=0xFFFF  

  153.     STR R1,[R0]  

  154.       

  155.     LDR R0,=rEPLL_CON0  

  156.     LDR R1,=(1<<31)|(32<<16)|(1<<8)|(2)  

  157.     STR R1,[R0]  

  158.       

  159.     LDR R0,=rEPLL_CON1  

  160.     LDR R1,=0x0  

  161.     STR R1,[R0]   

  162. ;=================  

  163. ;Select synchronous working mode  

  164. ;=================  

  165.     ldr r4, =rOTHERS  

  166.     ldr r5, [r4]  

  167.     bic r5, r5, #0xC0  

  168.     orr r5, r5, #0x40 ; SyncReq = Async, SyncMUX = Sync  

  169.     str r5, [r4]  

  170.       

  171. _wait_for_async ; confirm that the work is in synchronous mode  

  172.     ldr r5, [r4] ; Read OTHERS  

  173.     and r5, r5, #0xF00 ; Wait SYNCMODEACK = 0x0  

  174.     cmp r5, #0x0  

  175.     bne _wait_for_async  

  176.   

  177.     ldr r4, =rOTHERS  

  178.     ldr r5, [r4]  

  179.     bic r5, r5, #0x40 ;SyncMUX = Async  

  180.     str r5, [r4]  

  181.   

  182.     nop  

  183.     nop  

  184.     nop  

  185.     nop  

  186.     nop       

  187. ;------------------------------------------------- --------------------------------------------------      

  188. ; Set up DRAM  

  189.     LDR R0,=0x7E00F120    

  190.     LDR R1,=0xD  

  191.     STR R1,[R0]  

  192.           

  193.     LDR R0,=rP1MEMCCMD  

  194.     LDR R1,=0x4  

  195.     STR R1,[R0]  

  196.       

  197.     LDR R0,=rP1REFRESH        

  198.     LDR R1,=0x40D  

  199.     STR R1,[R0]  

  200.       

  201.   

  202.     LDR R0,=rP1CASLAT         

  203.     LDR R1,=0x6  

  204.     STR R1,[R0]   

  205.       

  206.     LDR R0,=rP1T_DQSS  

  207.     LDR R1,=0x1  

  208.     STR R1,[R0]  

  209.       

  210.     LDR R0,=rP1T_MRD  

  211.     LDR R1,=0x2  

  212.     STR R1,[R0]  

  213.     LDR R0,=rP1T_RAS  

  214.     LDR R1,=0x6  

  215.     STR R1,[R0]  

  216.   

  217.     LDR R0,=rP1T_RC  

  218.     LDR R1,=0xA  

  219.     STR R1,[R0]  

  220.   

  221.     LDR R0,=rP1T_RCD  

  222.     LDR R1,=0xB  

  223.     STR R1,[R0]  

  224.       

  225.     LDR R0,=rP1T_RFC  

  226.     LDR R1,=0x10B  

  227.     STR R1,[R0]  

  228.   

  229.     LDR R0,=rP1T_RP  

  230.     LDR R1,=0xB  

  231.     STR R1,[R0]  

  232.       

  233.     LDR R0,=rP1T_RRD  

  234.     LDR R1,=0x2  

  235.     STR R1,[R0]  

  236.       

  237.     LDR R0,=rP1T_WR  

  238.     LDR R1,=0x2  

  239.     STR R1,[R0]  

  240.       

  241.     LDR R0,=rP1T_WTR  

  242.     LDR R1,=0x2  

  243.     STR R1,[R0]  

  244.       

  245.     LDR R0,=rP1T_XP  

  246.     LDR R1,=0x2  

  247.     STR R1,[R0]  

  248.       

  249.     LDR R0,=rP1T_XSR  

  250.     LDR R1,=0x10  

  251.     STR R1,[R0]  

  252.       

  253.     LDR R0,=rP1T_ESR  

  254.     LDR R1,=0x10  

  255.     STR R1,[R0]  

  256.       

  257.     LDR R0,=rP1MEMCFG  

  258.     LDR R1,=0x1001A  

  259.     STR R1,[R0]  

  260.       

  261.     LDR R0,=rP1MEMCFG2  

  262.     LDR R1,=0xB45  

  263.     STR R1,[R0]   

  264.       

  265.     LDR R0,=rP1_chip_0_cfg  

  266.     LDR R1,=0x150F0  

  267.     STR R1,[R0]  

  268.       

  269.     LDR R0,=rP1_user_cfg  

  270.     LDR R1,=0x0  

  271.     STR R1,[R0]  

  272.       

  273.     LDR R0,=rP1_DIRECTCMD  

  274.     LDR R1,=0xC0000  

  275.     STR R1,[R0]  

  276.       

  277.     LDR R0,=rP1_DIRECTCMD  

  278.     LDR R1,=0x00000  

  279.     STR R1,[R0]  

  280.       

  281.     LDR R0,=rP1_DIRECTCMD  

  282.     LDR R1,=0x40000  

  283.     STR R1,[R0]  

  284.     STR R1,[R0]  

  285.       

  286.     LDR R0,=rP1_DIRECTCMD  

  287.     LDR R1,=0xA0000  

  288.     STR R1,[R0]  

  289.       

  290.     LDR R0,=rP1_DIRECTCMD  

  291.     LDR R1,=0x80032  

  292.     STR R1,[R0]  

  293.       

  294.     LDR R0,=rP1MEMCCMD  

  295.     LDR R1,=0x0  

  296.     STR R1,[R0]  

  297.   

  298.     LDR R0,=rP1MEMSTAT    

  299. DRAM_WAIT  

  300.     LDR R1,[R0]  

  301.     AND R1,R1,#0x3  

  302.     CMP R1,#0x1  

  303.     BNE DRAM_WAIT  

  304. ;------------------------------------------------- --------------------------------------------------      

  305.   

  306.   

  307.       

  308.   

  309. ; Set up the stack  

  310. ;STACK_TOP EQU 0x52000000;0x0c000400     

  311. ; LDR SP,=STACK_TOP  

  312.   

  313. ;------------------------------------------------- --------------------------------------------------  

  314. ; Enable VIC  

  315.     mrc p15,0,r0,c1,c0,0  

  316.     orr r0,r0,#(1<<24)  

  317.     mcr p15,0,r0,c1,c0,0  

  318. ;------------------------------------------------- --------------------------------------------------  

  319. ; Enable VFP  

  320.     MRC p15, 0, r0, c1, c0, 2   

  321.     ORR r0, r0, #0x00F00000   

  322.     MCR p15, 0, r0, c1, c0, 2   

  323.       

  324.     MOV r1, #0   

  325.     MCR p15, 0, r1, c7, c5, 4   

  326.     MOV r0,#0x40000000   

  327.     FMXR FPEXC, r0; FPEXC = r0   

  328.     nop   

  329.     nop   

  330. ;------------------------------------------------- --------------------------------------------------  

  331.     LDR R0,=rGPMCON  

  332.     LDR R1,=0x11111  

  333.     STR R1,[R0]  

  334.       

  335.     LDR R0,=rGPMPUD  

  336.     LDR R1,=0x0  

  337.     STR R1,[R0]  

  338.       

  339.     LDR R0,=rGPMDAT  

  340.     LDR R1,=0  

  341.     STR R1,[R0]  

  342.   

  343.     B main  

  344.   

  345.           

  346.   

  347.           

  348.       

  349.     END  


//Main function


  1. #include "system.h"  

  2. #include "uart.h"  

  3. #include "other.h"  

  4. #include "SDCARD.h"  

  5.   

  6.   

  7. //Simple delay  

  8. void Delay_Ms(u32 n)  

  9. {  

  10.     u32 i;  

  11.       

  12.     while(n --)  

  13.     {  

  14.         for(i = 0;i < 0xfff;i ++)  

  15.         {  

  16.             nop;  

  17.         }  

  18.                

  19.     }  

  20.       

  21. }  

  22.   

  23.   

  24.   

  25. // Jump to the specified location to execute  

  26. __asm ​​jump()  

  27. {  

  28.     LDR PC,=0x52000000;  

  29. }  

  30.   

  31.   

  32.   

  33. //Key detection  

  34. bool Key_Test(void)  

  35. {  

  36.     static u8 i = 0;  

  37.       

  38.     if((rGPNDAT & 0x3f) != 0x3f )  

  39.     {  

  40.         i++;  

  41.         if(i > 10)  

  42.         {  

  43.             i = 0;  

  44.               

  45.             return TRUE;  

  46.         }  

  47.     }  

  48.     return FALSE;  

  49. }  

  50.   

  51.   

  52. //Main function  

  53. int main(void)  

  54. {     

  55.     u16 n = 0;  

  56.     u32 cnt1 = 0, cnt2 = 0;  

  57.   

  58.     LED_Init(); //Initialize LED  

  59.     UART0_Init(ENABLE,115200); //Initialize the serial port  

  60.     UARTx_SetRxBuff(UART_CH0, (u8 *)0x52000000, 1024*1024*10); //Set the serial port receive buffer  

  61.     rGPNCON = 0; //Initialize the button  

  62.     UART0_SendString("SD BOOT started successfully!\r\n");  

  63.       

  64.     Delay_Ms(100);  

  65.       

  66.     //The button is not pressed to load the program from the SD card  

  67.     if((rGPNDAT & 0x3f) == 0x3f)  

  68.     {  

  69.         Delay_Ms(10);  

  70.         if((rGPNDAT & 0x3f) == 0x3f )  

  71.         {  

  72.             if(SD_Init() == SD_OK)  

  73.             {  

  74.                 UART0_SendString("SD card initialization successful!\r\n");  

  75.                 if(SD_ReadMultiBlocks(1621032, (u32 *)0x52000000, 1000) == SD_OK)  

  76.                 {  

  77.                     UART0_SendString("Successfully read program from SD card, start execution from 0x52000000!\r\n");  

  78.                     jump(); //jump  

  79.                 }  

  80.                 else  

  81.                 {  

  82.                     UART0_SendString("Failed to read program from SD card!\r\n");  

  83.                     LED0_FLASH();  

  84.                 }  

  85.             }  

  86.             else  

  87.             {  

  88.                 UART0_SendString("SD card initialization failed!\r\n");  

  89.             }  

  90.         }  

  91.     }  

  92.       

  93.       

  94.     while((rGPNDAT & 0x3f) != 0x3f); //Wait for the button to be released  

  95.     Delay_Ms(100);  

  96.     // Load the program from the serial port  

  97.     UART0_SendString("Please send code from the serial port!\r\n");  

  98.     while(1)  

  99.     {  

  100.         n++;  

  101.         if(n == 300)  

  102.         {  

  103.             LED1_FLASH();  

  104.             n = 0;  

  105.             cnt1 = cnt2;  

  106.             cnt2 = UARTx_GetRxCnt(UART_CH0);  

  107.             if(cnt1!=cnt2)  

  108.             {  

  109.                 LED2_FLASH();  

  110.             }  

  111.             else if(cnt2 == 0)  

  112.             {  

  113.                   

  114.                 //UART0_SendString("Please send code from the serial port!\r\n");  

  115.                 LED3_FLASH();  

  116.             }  

  117.         }  

  118.           

  119.           

  120.         if(Key_Test() == TRUE)  

  121.         {  

  122.             //Test to check memory  

  123.             *((vu32 *)0x59000000) = 0xa55aaa55;  

  124.             *((vu32 *)0x59000000)+=1;  

  125.             if(*((vu32 *)0x59000000) == (0xa55aaa55+1))  

  126.             {  

  127.                 UART0_SendString("Memory 0x59000000 is checked correctly!\r\n");  

  128.             }  

  129.             else  

  130.             {  

  131.                 UART0_SendString("Memory 0x59000000 error!\r\n");  

  132.             }  

  133.             //Test to check memory  

  134.             *((vu32 *)0x54000000) = 0xaa5aaa55;  

  135.             *((vu32 *)0x54000000)-=1;  

  136.             if(*((vu32 *)0x54000000) == (0xaa5aaa55-1))  

  137.             {  

  138.                 UART0_SendString("Memory 0x54000000 is checked correctly!\r\n");  

  139.             }  

  140.             else  

  141.             {  

  142.                 UART0_SendString("Memory 0x54000000 error!\r\n");  

  143.             }  

  144.             UART0_SendString("Sending completed, start execution from 0x52000000!\r\n");  

  145.             jump(); //jump  

  146.         }  

  147.         Delay_Ms(1);      

  148.     }  

  149. }  


  1. if(SD_ReadMultiBlocks(1621032, (u32 *)0x52000000, 1000)  

When no key is pressed, a comparison program is loaded from the specified location of the SD card for execution, which can be an operating system or your own bare metal program.



1621032: The location of the program in the SD card. Note that it is the physical sector, not the logical sector. The physical sector is the sector address that the bare metal code you wrote can read, such as 1, 2, etc. The logical sector is the sector provided by the file system. The two locations are different, so pay attention.


  1. 0x52000000 The location where the program starts should be specified during compilation, usually in SDRAM.  


  1. 1000: The number of sectors to be loaded. Each sector is 512B in size, so my program loads 512KB.  



1. Download the program using the serial port

After you are ready, download the program from the serial port. Press and hold any button, except RESET, to use the serial port to download the program. The baud rate is 115200. I use the OK6410 development board, so the button detection is if((rGPNDAT & 0x3f) != 0x3f );


After startup, use the serial port to send bin



After sending, press any button (except reset) to start execution


You can see that the program has started to execute. At the beginning, I used the serial port to download the program. After a while, the CPU would die. I had to toss and turn for an afternoon. Finally, I found that the CPU main frequency was too high. It was initialized to 633MHZ, and the result was unstable. Now it is 533MHZ, which is more stable.


2. I have put the big program to be started in the specified location of the SD card. Just reset it and do not press any button to load it. Later, an interface will be made to choose which program to start, just like flashing the SD card of an Android phone, you can choose the startup program.



3. How to write the boot program to the SD card

Writing is relatively simple, see the picture below

First use a hexadecimal editor to open the disk, it must be a physical disk


Specify the offset to the last 0x2400B. Note: 4G and above cards are not at this position. Go to Baidu.

Note the options in the box



Open the SD_BOOT bin file, select all, and copy



Switch to the specified location of the SD card

Right click -> Edit -> Clipboard Data -> Write


Be sure to start writing at the specified sector, and don't forget to save after writing.


Another program that needs to be started can also use this tool to check its location

Pay attention to the physical sector number


Mainly because the file system cannot be added to the 8K code, if this code is started, there will be no restrictions, and interfaces and other things can be added. Later, the L2 code will be improved to achieve more convenient functions.


Attached is the project RVDS4.0 settings

L1 code settings


In order to reduce the code size, the optimization level should be set higher, and the lowest level can be used for normal testing.





L2 Code Engineering


Other location settings are the same




Attached project download location: http://download.csdn.net/detail/cp1300/6694183

I use RVDS4.0. If you want to download or use it, you can read my blog post, which details the installation and settings of RVDS4.0.

http://blog.csdn.net/cp1300/article/details/7772645 //Installation

http://blog.csdn.net/cp1300/article/details/7772809 //Create a project

http://blog.csdn.net/cp1300/article/details/8164042 //Debugging

http://blog.csdn.net/cp1300/article/details/8237076 //Debug patch


Keywords:S3C6410 Reference address:S3C6410 pure bare metal boot, self-written SD BOOT boot

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