MSP430 MCU Hardware Knowledge - Reset

The MSP430 microcontroller is an ultra-low power microprocessor that TI began to market in 1996. In addition, it also integrates many module functions, so that one MSP430 chip can complete the functions that can only be completed by multiple chips, greatly reducing the size and cost of the product. Today, the MSP430 microcontroller has been used in various fields, especially in instrumentation, monitoring, medical equipment and automotive electronics.
 
Here are its main features:
(1) Low power supply voltage range, 1.8~3.6V.
(2) Ultra-low power consumption, with 5 low power modes (to be introduced in detail later).
(3) Flexible clock usage mode.
(4) High-speed computing power, 16-bit RISC architecture, 125ns instruction cycle.
(5) Rich functional modules, including: A: multi-channel 10-14 bit AD converter; B: dual 12-bit DA converter; C: comparator; D: LCD driver; E: power supply voltage detection; F: serial port USART (UART/SPI); G: hardware multiplier; H: watchdog timer, multiple 16-bit and 8-bit timers (capable of capture, comparison, PWM output); I: DMA controller.
(6) FLASH memory, no additional high voltage is required, and the program can be controlled to write and erase the segment during operation;
(7) The MSP430 chip includes a JTAG interface. Simulation debugging can be easily realized through a simple JTAG interface converter, such as setting breakpoints, single-step execution, reading and writing registers, etc.; (8)
Fast and flexible programming mode, which can be used to load programs into the CPU through JTAG and BSL. 

    Regarding its memory structure, there is a detailed introduction in the craftsman's blog, so you can go and have a look. Here I will mainly talk about the reset of the MSP430 microcontroller. 

     There are two reset signals for MSP430: power-on reset signal (POR) and power-on clear signal (PUC). There are also signals that can trigger POR and PUC: 5 from the watchdog, 1 from the reset pin, and 1 from the signal generated by an error in writing the FLASH key value. The 

POR signal only occurs in 2 situations:
(1) the microprocessor is powered on;
(2) the system is reset when a low level is generated on the RST/NMI pin. 

    The conditions for the generation of the PUC signal:
(1) the POR signal is generated;
(2) when the watchdog is valid, the watchdog timer overflows;
(3) an error occurs when writing the watchdog timer security key value;
(4) an error occurs when writing the FLASH memory security key value. 

    The relationship between POR and PUC: the generation of the POR signal will cause the system to reset and generate the PUC signal. The PUC signal will not cause the generation of the POR signal. 

    Whether the reset is triggered by the POR signal or the PUC signal, the MSP430 will read the reset interrupt vector from address 0xFFFE, and the program will start executing from the address pointed to by the interrupt vector. Among the conditions for triggering the PUC signal, in addition to the POR generating the trigger PUC signal, the other conditions can be used to determine the cause of the PUC signal by reading the corresponding interrupt vector so as to make corresponding processing. 

    The state after the system reset (referring to POR) is:
(1) The RST/NMI pin function is set to the reset function;
(2) All I/O pins are set to input;
(3) The peripheral modules are initialized, and their register values ​​are the default values ​​in the relevant manual;
(4) The status register SR is reset;
(5) The watchdog is activated and enters the working mode;
(6) The program counter PC is loaded with the address at 0xFFFE, and the microprocessor starts to execute the program from this address. 

    There are three typical reset circuits: 
(1) Connect a 100K ohm pull-up resistor to the RST/NMI pin.
(2) On the basis of (1), connect a 0.1uf capacitor and ground one end of the capacitor to make the reset more reliable.
(3) Based on (2), a diode model IN4008 is connected in parallel with the resistor to reliably power on the system immediately after power failure.