ARM processors have twenty-seven registers, some of which are conditionally used, so only sixteen are available at a time...
Registers 0 through 7 are general purpose registers and can be used for any purpose. Unlike the 80x86 processors that require specific registers to be used for stack access, or the 6502 that places the results of mathematical calculations in an accumulator, the ARM processor is highly flexible in register usage.
Registers 8 through 12 are general purpose registers, but their shadow registers are used when switching to FIQ mode.
Register 13 is typically used as the OS stack pointer, but can be used as a general purpose register. This is an operating system issue, not a processor issue, so if you don't use the stack, you are free to corrupt it in your code as long as you restore it later. Each processor mode has a shadow register of this register.
Register 14 is dedicated to holding the address of the return point to facilitate writing subroutines. When you take a branch with a link, store the return address in R14. Also, when the program is first run, save the exit address in R14. All instances of R14 must be saved to other registers (not actually valid) or to a stack. This register has a shadow register in each processor mode. Once the link address has been saved, this register can be used as a general purpose register.
Register 15 is the program counter. In addition to holding a twenty-six-bit number indicating the address currently used by the program, it also holds the state of the processor.
For more clarity... Here is the diagram:
User Mode SVC Mode IRQ Mode FIQ Mode APCS
R0 ------- R0 ------- R0 ------- R0 a1
R1 ------- R1 ------- R1 ------- R1 a2 R2 -------
R2 ------- R2 ------- R2 a3
R3 ------- R3 ------- R3 ------- R3 a4
R4 ------- R4 ------- R4 ------- R4 v1
R5 ------- R5 ------- R5 ------- R5 v2
R6 ------- R6 ------- R6 ------- R6 v3
R7 ------- R7 ------- R7 ------- R7 v4
R8 ------- R8 ------- R8 R8_fiq v5
R9 ------- R9 ------- R9 R9_fiq v6
R10 ------ R10 ------ R10 R10_fiq sl
R11 ------ R11 ------ R11 R11_fiq fp
R12 ------ R12 ------ R12 R12_fiq ip
R13 R13_svc R13_irq R13_fiq sp
R14 R14_svc R14_irq R14_fiq lr
------------- R15 / PC -------------
The rightmost column of pc is the name used by the APCS code, for more information on APCS see here.
The program counter is constructed as follows:
Bits 31 30 29 28 27 26 25------------2 1 0
N Z C V I F Program Counter S1 S0
For a detailed explanation of R15, see psr.html.
Here are the "modes" you want to know about, such as the "FIQ" mode mentioned above.
User mode, the normal mode in which applications run. Your memory access is restricted and you cannot read hardware devices directly.
Supervisor mode (SVC mode), mainly used for SWI (software interrupts) and OS (operating system). This mode has additional privileges, allowing you to further control the computer. For example, you must enter supervisor mode to read a plug-in (podule). This cannot be done in user mode.
Interrupt mode (IRQ mode), used to handle peripherals that issue interrupts. This mode is also privileged. Devices that cause IRQs are keyboards, VSync (when screen refresh occurs), IOC timers, serial ports, hard disks, floppy disks, etc...
Fast interrupt mode (FIQ mode), used to handle peripherals that issue fast interrupts. This mode is privileged. Devices that cause FIQs are floppy disks that process data, serial ports (such as A5000 on 82C71x machines) and Econet.
The difference between IRQ and FIQ is that with FIQ you must do your business and leave this mode as soon as possible. IRQ can be interrupted by FIQ but IRQ cannot interrupt FIQ. To make FIQ faster, there are more shadow registers. FIQ cannot call SWI. A FIQ must also disable interrupts. If a FIQ routine must re-enable interrupts, it is too slow and should be an IRQ instead of a FIQ.
Reference address:arm register svc mode
Registers 0 through 7 are general purpose registers and can be used for any purpose. Unlike the 80x86 processors that require specific registers to be used for stack access, or the 6502 that places the results of mathematical calculations in an accumulator, the ARM processor is highly flexible in register usage.
Registers 8 through 12 are general purpose registers, but their shadow registers are used when switching to FIQ mode.
Register 13 is typically used as the OS stack pointer, but can be used as a general purpose register. This is an operating system issue, not a processor issue, so if you don't use the stack, you are free to corrupt it in your code as long as you restore it later. Each processor mode has a shadow register of this register.
Register 14 is dedicated to holding the address of the return point to facilitate writing subroutines. When you take a branch with a link, store the return address in R14. Also, when the program is first run, save the exit address in R14. All instances of R14 must be saved to other registers (not actually valid) or to a stack. This register has a shadow register in each processor mode. Once the link address has been saved, this register can be used as a general purpose register.
Register 15 is the program counter. In addition to holding a twenty-six-bit number indicating the address currently used by the program, it also holds the state of the processor.
For more clarity... Here is the diagram:
User Mode SVC Mode IRQ Mode FIQ Mode APCS
R0 ------- R0 ------- R0 ------- R0 a1
R1 ------- R1 ------- R1 ------- R1 a2 R2 -------
R2 ------- R2 ------- R2 a3
R3 ------- R3 ------- R3 ------- R3 a4
R4 ------- R4 ------- R4 ------- R4 v1
R5 ------- R5 ------- R5 ------- R5 v2
R6 ------- R6 ------- R6 ------- R6 v3
R7 ------- R7 ------- R7 ------- R7 v4
R8 ------- R8 ------- R8 R8_fiq v5
R9 ------- R9 ------- R9 R9_fiq v6
R10 ------ R10 ------ R10 R10_fiq sl
R11 ------ R11 ------ R11 R11_fiq fp
R12 ------ R12 ------ R12 R12_fiq ip
R13 R13_svc R13_irq R13_fiq sp
R14 R14_svc R14_irq R14_fiq lr
------------- R15 / PC -------------
The rightmost column of pc is the name used by the APCS code, for more information on APCS see here.
The program counter is constructed as follows:
Bits 31 30 29 28 27 26 25------------2 1 0
N Z C V I F Program Counter S1 S0
For a detailed explanation of R15, see psr.html.
Here are the "modes" you want to know about, such as the "FIQ" mode mentioned above.
User mode, the normal mode in which applications run. Your memory access is restricted and you cannot read hardware devices directly.
Supervisor mode (SVC mode), mainly used for SWI (software interrupts) and OS (operating system). This mode has additional privileges, allowing you to further control the computer. For example, you must enter supervisor mode to read a plug-in (podule). This cannot be done in user mode.
Interrupt mode (IRQ mode), used to handle peripherals that issue interrupts. This mode is also privileged. Devices that cause IRQs are keyboards, VSync (when screen refresh occurs), IOC timers, serial ports, hard disks, floppy disks, etc...
Fast interrupt mode (FIQ mode), used to handle peripherals that issue fast interrupts. This mode is privileged. Devices that cause FIQs are floppy disks that process data, serial ports (such as A5000 on 82C71x machines) and Econet.
The difference between IRQ and FIQ is that with FIQ you must do your business and leave this mode as soon as possible. IRQ can be interrupted by FIQ but IRQ cannot interrupt FIQ. To make FIQ faster, there are more shadow registers. FIQ cannot call SWI. A FIQ must also disable interrupts. If a FIQ routine must re-enable interrupts, it is too slow and should be an IRQ instead of a FIQ.
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