The configuration process of external interrupts in ARM is for reference-EEWORLD

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Recently I looked at the configuration of ARM's external interrupts. The specific configuration is as follows:

1) Enable the port clock;

2) Configure the required port as an input port. The specific registers are: port configuration low register (GPIOx_CRL) and port configuration high register (GPIOx_CRＨ).

For example, GPIOA->CRL&=0XFFFFFFF0; //PA0 is set as input

　 GPIOA->CRL|=0X00000008;

Set the default level of the port. The specific register is: Port Output Data Register (GPIOx_ODR) (x=A..E),

For example, GPIOA->ODR|=1<<13;

3) Set the mapping relationship between IO ports and interrupt lines. ARM7 supports 16 input points, and the corresponding configuration registers are: External Interrupt/Event Controller (EXTIX) Register (X: 1~4),

Set the input point to be configured and set the register corresponding to the input point to:

PA[x] pin
PB[x] pin
PC[x] pin
PD[x] pin
PE[x] pin

If 13 is set as PA pin, the code can be written like this:

AFIO->EXTICR[EXTADDR]&=~(0x000F< AFIO->EXTICR[EXTADDR]|=GPIOx<

4) Set the trigger conditions for the interrupt;

5) Configure interrupt groups and enable interrupts;

6) Write the interrupt service function.

Keywords：ARM Reference address：The configuration process of external interrupts in ARM is for reference

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