About ARM's asynchronous bus and synchronous mode

In fast bus mode, GCLK is derived from BCLK and the FCLK input is ignored. This means that BCLK is used to control the AMBA ASB interface and the internal ARM920T processor core. At reset, the ARM920T enters fast bus mode and operates using BCLK. Generally, fast bus mode is executed during startup code, and then the PLL is configured by software to generate a high-frequency FCLK. After the PLL is stable, the ARM920T can be switched to synchronous or asynchronous clock and operated using FCLK.

summary:

1. GCLK = BCLK, FCLK is ignored
2. The board enters this mode after reset
3. The typical application of this mode is to execute the startup code, and the software configures the PLL to make FCLK higher
4. nF = 0 and iA = 0

synchronous mode:

In this operation mode, GCLK comes from BCLK or FCLK. However, there are 3 conditions that must be met for BCLK and FCLK:

1. FCLK must have a higher frequency than BCLK

2. FCLK must be an integer multiple of BCLK frequency

3. No matter how BCLK is switched, the frequency of FCLK must be higher than BCLK

summary:

1. GCLK = BCLK or GCLK = FCLK
2. FCLK = n*BCLK (n is greater than 1 and is an integer)
3. BCLK is used to control the AMBA ASB interface, while FCLK is used to control the internal ARM920T processor core. When accessing external memory addresses, the processor core either continues to use FCLK or switches to BCLK.
4. nF = 1 and iA = 0
asynchronous mode:
In this operating mode, GCLK comes from BCLK or FCLK. FCLK and BCLK can be completely asynchronous, and the only condition to be met is that the frequency of FCLK is higher than BCLK. BCLK is used to control the AMBA ASB bus interface, and FCLK is used to control the internal ARM920T processor core. As in synchronous mode, the cost of switching from FCLK to BCLK is equal to that of switching from BCLK to FCLK. It takes 0 to 1 clock cycles to resynchronize the core. The cost of switching from FCLK to BCLK is 0 to 1 BCLK. The cost of switching from BCLK to FCLK is 0 to 1 FCLK.

summary:

1. GCLK = BCLK or GCLK = FCLK
2. BCLK is used to control the AMBA ASB interface, while FCLK is used to control the internal ARM920T processor core. When accessing external memory addresses, the processor core either continues to use FCLK or switches to BCLK.
3. nF = 1 and iA = 1
 

Note:

    nF is the 31st bit of register 1 of P15
    iA is the 30th bit of register 1 of P15 

Note:

    nF is the 31st bit of register 1 of P15
    iA is the 30th bit of register 1 of P15

 

S3C2440 does not support synchronous mode so it can only switch from fast mode to asynchronous mode.