Study on the design of intelligent sensors for SOC/IP

　　Intelligent sensor technology is a modern sensor technology that is booming. It is a comprehensive technology involving multiple disciplines such as micromechanical and microelectronic technology, computer technology, network and communication technology, signal processing technology, circuits and systems, sensing technology, neural network technology, information fusion technology, wavelet transform theory, genetic theory, fuzzy theory, etc.

　　Intelligent functions in smart sensors, such as digital signal output, information storage and memory, logical judgment, decision-making, self-test, self-calibration, and self-compensation, are all based on microprocessors. Microprocessor-based sensors have evolved from simple digitization and information processing to modern smart sensors that have gradually improved with new theories and technologies such as network communication functions, neural networks, fuzzy theory, genetic theory, wavelet transform theory, and multi-sensor information fusion. Its microprocessor hardware has also experienced a transition from a single CPU structure to a multi-CPU structure or even a hybrid structure of DSP, ASIC, and MCU. However, microprocessors have inherent and insurmountable shortcomings and deficiencies in reliability, power consumption, and functional reuse, which hinder the further development of smart sensors. The transition from system IC to SOC (System on ChIP) has become an inevitable trend of historical development. SOC uses hardware to implement functions that were previously implemented by software. Compared with general MCUs, it has a series of advantages such as high reliability, low price, fast speed, small size, functional reuse, and good confidentiality. Traditional SOC design is based on ultra-deep submicron IC design technology and has the complexity of integrated circuit ASIC design. With the development of SOC platform and EDA technology and the promotion of new IP economic model, more and more SOC application design has shifted from traditional silicon chip design to large-scale programmable FPGA chip design. FPGA-based SOC design has the characteristics of short development cycle, standardized development tools and languages, and design and device independence, making it as easy as using a single-chip microcomputer. A large number of reports on successful FPGA applications are in the fields of image processing, power systems, etc. Applications in the field of sensor intelligence are still in the development and research stage. A small number of applications in sensors are limited to using it as one or several independent functional modules, such as communication modules and self-compensation modules, which do not have the role and function of the system and cannot truly become a system on chip (SOC). This article will propose an intelligent sensor SOC/IP design that integrates functional modules such as acquisition system, compensation correction, data processing, data communication, task scheduling, human-machine interface, IP function reuse, and an implementation method based on FPGA and ARM7 microprocessor chips.

　　SOC/IP Concept and Smart Sensor SOC Design Method

　　SOC: System on Chip refers to a system built on a single chip. IP: Intellectual Property. The traditional design method of smart sensors is based on functional design. The SOC design method is based on functional reuse and construction, using several macro modules on the chip to build a complex system. These developed macro modules are universal IP cores. The reuse of IP cores can reduce the complexity of product design and shorten the time to market.

　　The SOC/IP chip can form a complete intelligent sensor system. The sensing parameters of intelligent sensors may be varied. But in terms of functional module composition, it mainly includes data acquisition module, compensation and correction module, data processing module, data network communication module, human-machine interface and task management and scheduling module. Therefore, the design process of the intelligent sensor SOC based on IP is: first correctly establish the general module model of the intelligent sensor; then reasonably divide the functional specifications of each module, formulate the interface protocols and standards between the modules; then design a series of general IP cores; finally, build and integrate the required general IP cores to form a complete intelligent sensor system.

　　Intelligent sensor IP core design and SOC construction

　　Smart sensors involve various functions such as data acquisition, signal processing (program-controlled amplification, linearization, signal filtering, signal compensation, artificial neural network, genetic theory, multi-sensor fusion, fuzzy theory, etc.), data communication, human-machine interface and task scheduling. In IP core design and SOC construction, in order to simplify the work and reduce complexity, we choose two SOC design methods: FPGA-based IP core and ARM7TDMI-SCPU-based IP core. The FPGA IP core mainly completes the data acquisition and signal processing modules, and the ARM7-based IP core completes data communication, human-machine interface and task scheduling.

　　data collection

　　Traditional sensor signal digitization mostly uses VFC, serial A/D, parallel A/D and other solutions. Each solution can be designed into a corresponding IP core. Although some people have used FPGA to complete data acquisition, they are all designed in a specific application way rather than a general IP core way. We introduce the parallel A/D interface IP core design completed by MAX125. MAX125 is an 8-channel 14-bit parallel A/D chip. In the FPGA A/D IP core design, the signals provided to MAX125 include the timing signals for starting the conversion and the timing signals after the conversion is completed, and the data signals for reading the conversion results and storing them in the RAM inside the FPGA chip. We have successfully developed this A/D IP core and have been well used.

　　Signal processing
       is one of the main contents of intelligent sensors. It usually includes linearization, filtering, various compensations, artificial neural networks, fuzzy theory, genetic algorithms, multi-sensor fusion and other tasks. In filtering, in addition to conventional FFT and DFT, wavelet transform has also appeared in recent years. Due to the advantage of chip speed, how to achieve universal design of various signal processing IP cores has become the key to the design of related signal processing algorithm IP cores.

　　For example, in the linearization processing design, we design the linearization algorithms of various sensors into a universal linearization IP core. When calling the task, we configure and select the corresponding algorithm IP core according to the linearization algorithm requirements of different types of sensors for actual use.