Interpretation of JTAG interface of embedded development arm technology

    JTAG is generally divided into two categories: one is used to test the electrical characteristics of the chip and detect whether the chip has problems; the other is used for debugging. Generally, CPUs that support JTAG include these two modules. A

    CPU with a JTAG Debug interface module can access the internal registers of the CPU and the devices hanging on the CPU bus through the JTAG interface as long as the clock is normal, such as FLASH, RAM, SOC (such as 4510B, 44Box, AT91M series) built-in module registers, such as UART, Timers, GPIO, etc.

    The above mentioned are only the capabilities of the JTAG interface. To use these functions, software cooperation is also required, and the specific functions implemented are determined by the specific software.
    For example, the function of downloading programs to RAM. Those who understand SOC know that to use external RAM, you need to refer to the register description of the SOC DataSheet to set the base address of the RAM, bus width, access speed, etc. Some SOCs also need Remap to work properly. When running the Firmware, these settings are completed by the Firmware initialization program. However, if you use the JTAG interface, the relevant registers may still be at the power-on value, or even the wrong value, and the RAM cannot work properly, so the download will inevitably fail. To use it normally, you must first find a way to set the RAM. In ADW, you can set it in the Console window through the Let command, and in AXD, you can set it in the Console window through the Set command.
    The following is a command sequence for setting up AT91M40800, turning off interrupts, setting CS0-CS3, and remap, suitable for AXD (Debug with ADS)
setmem 0xfffff124,0xFFFFFFFF,32 －－－Turn off all interrupts
setmem 0xffe00000,0x0100253d,32 －－－Set CS0
setmem 0xffe00004,0x02002021,32 －－－Set CS1
setmem 0xffe00008,0x0300253d,32 －－－Set CS2
setmem 0xffe0000C,0x0400253d,32 －－－Set CS3
setmem 0xffe00020,1,32 －－－Remap
, if you want to use it in ADW (DEBUG with SDT), you need to change it to:
let 0xfffff124=0xFFFFFFFF －－－Turn off all interrupts
let 0xffe00000=0x0100253d －－－Set CS0
let 0xffe00004=0x02002021 －－－Set CS1
let 0xffe00008=0x0300253d －－－Set CS2
let 0xffe0000C=0x0400253d －－－Set CS3
let 0xffe00020=1 －－－Remap
For ease of use, you can save the above commands as a file config.ini, and enter ob config.ini in the Console window to execute it.
    Using other debuggers is generally similar, except that the commands and command formats are different.


    When setting RAM, the registers and register values ​​must be consistent with the settings of the program to be run. Generally, the target file generated by compilation is in ELF format or similar format, which contains the target code running address, which is determined during Link. When Debug downloads the program, the program is downloaded to the specified address according to the address information in the ELF file. If the base address of RAM is set to 0x10000000, and the start address of the Firmware is specified at 0x02000000 during compilation, the target code will be downloaded to 0x02000000, and the download will obviously fail.

    All interrupts should be turned off before downloading the program through JTAG. This is the same reason as turning off interrupts during Firmware initialization. When using the JTAG interface, the enablement of each interrupt is unknown, especially when there is executable code in FLASH, some interrupts may be enabled. After using JTAG to download the code, when it is to be executed, an interrupt may be generated because the initialization is not completed, causing the program to be abnormal. Therefore, it is necessary to turn off the interrupt first, which is generally done by setting the interrupt control register of the SOC.

    Use JTAG to write Flash. In theory, all devices on the CPU bus can be accessed through JTAG, so it should be possible to write FLASH, but the way to write FLASH is very different from RAM, and special commands are required. In addition, different FLASH erase and programming commands are different, and the size and number of blocks are also different, so it is difficult to provide this function. Therefore, generally Debug does not provide the function of writing Flash, or only supports a small number of Flash.

    As far as I know, for arm, only the software FlashPGM provides the function of writing FLASH, but it is also very troublesome to use. AXD and ADW do not provide the function of writing FLASH. When I write Flash, I write a simple program myself, which is specifically used to write the FLASH of the target board, use the JTAG interface, download it to the target board, then install the target code to be burned into BIN format, also download it to the target board (the address is different from the address of the program burning FLASH), and then run the downloaded program to burn FLASH. Using this method, the speed seems to be faster than writing Flash with FlashPGM.

    About simple JTAG cables.
    There are various simple JTAG cables available, which are actually just a level conversion circuit and also play a protective role. The logic of JTAG is implemented by software running on the PC, so in theory, any simple JTAG cable can support various application software, such as Debug. I have used the same JTAG cable to write Xilinx CPLD, AXD/ADW debugger. The key lies in software support. Most software does not provide setting functions, so it can only support a certain JTAG cable.

    About the speed of simple JTAG cables.
    JTAG is a serial interface. The simple JTAG cable using the printer port takes advantage of the latching feature of the printer port output, and uses software to generate JTAG timing through I/O. According to the JTAG standard, a series of operations are required to write/read a byte through JTAG. According to my analysis, using a simple JTAG cable and using the printer port to output a byte to the target board through JTAG requires an average of 43 printer port I/Os. On my machine (P4 1.7G), about 660K I/O operations can be performed per second, so the download speed is about 660K/43, which is about 15K Byte/S. For other machines, the I/O speed is roughly the same, generally 600K ~ 800K.

    Regarding how to increase the JTAG download speed.
Obviously, using a simple JTAG cable cannot increase the speed. To increase the speed, there are roughly two ways:
1. Use the embedded system to provide a JTAG interface, and the embedded system and the microcomputer are connected via USB/Ethernet, which requires the use of an MCU.
2. Use CPLD/FPGA to provide JTAG interface, use EPP interface between CPLD/FPGA and microcomputer (generally microcomputer printer port supports EPP mode), EPP interface completes data transmission between microcomputer and CPLD/FPGA, and CPLD/FPGA completes JTAG timing.