Design of Signal Analysis System for RF Reader/Writer Based on SPCE061A

　　Radio frequency identification (RFID) technology is a non-contact automatic identification technology based on the radio frequency principle. Its basic principle is that the signal transmits information through spatial coupling (alternating magnetic field and electromagnetic field), and this information is generally loaded in the electronic tag. The data format of the information usually has a standard Wiegand signal or various serial communication interface signals.

　　At present, the application of readers is becoming more and more widespread. In the process of production and sales, people often suffer from the lack of a quick and easy way to intuitively display the output signal of the reader, so that the product often needs to be reworked and the signal output of the product needs to be recalibrated in production. To solve this problem, the SPCE061A microcontroller with voice processing function is used as the controller to analyze and process the common output signals of the RF reader.

　　1 Overall design of signal analysis system

　　In the RF reader, the common signals that need to be analyzed and processed include RS-232 signals, RS-485 and Wiegand signals. The Lingyang SPCE061A microcontroller can be used to process these signals. The Lingyang SPCE061A microcontroller has the common functions of the 51 microcontroller, and the on-chip resources are highly integrated, such as ADC, DAC, RAM, Flash, timer, phase-locked loop, low voltage detection and reset, watchdog, ICE interface, etc.; In addition, SPCE061A has a built-in 32K word flash memory, and its u'nSP instruction system also provides 16-bit × 16-bit multiplication instructions and inner product instructions with high processing speed, which can easily and quickly process various complex digital signals. Therefore, this system uses SPCE061A as the core control circuit to develop peripheral circuits. The overall block diagram of the system is shown in Figure 1.

　　In this system, in order to select the data type to be tested, a data switching button is designed in the system so that the system can select and process the read data. At the same time, in order to visually see the data signal to be analyzed, an LCD is set in the system. The LCD can display the ID of the read data, and the system can alarm the wrong ID through the voice module. This article focuses on the method of using SPCE061A to analyze and process common signals (such as RS-485 and Wiegand signals).

　　1.1 RS-485 data signal processing

　　The data frame format of the RS-485 signal to be processed in this article is as follows:

　　①Data start flag STX=02H, data end flag ETX=03H.

　　②DATA is the read electronic tag number, and its length is 8 bytes of ASCII code. Divide the data into 4 groups from high to low, and then express the value of the 4-bit binary number in ASCII code. Since the value range of the 4-bit binary number is 0H~FH, the converted ASCII code is 30H~39H, 41H~46H. For example: the 32-bit number data is 6A90F103H, which is converted into 8-byte ASCII code as "36H 41H39H 30H 46H 31H 30H 33H".

　　③BCC is the check code, which is the result of "XOR" of each byte from STX to ETX. When receiving, the SPCE061A microcontroller checks and calculates the received data, and then compares it with the check code to make error judgment.

　　When using the SPCE061A microcontroller to analyze RS-485 signals, the MAX481 from Maxim is used as the driver chip for RS-485. This chip integrates a driver and a receiver, and complies with RS-422A and RS-485 communication standards. The MAX481 pins are shown in Figure 2. The pin functions are listed in Table 1.

　　The interface circuit between SPCE061A and RS-485 is shown in Figure 3.

　　The serial port pins IOA10 and IOA13 of SPCE061A are connected to the RO and DI pins of MAX481 respectively for serial data exchange; the control pins IOA12 and IOA11 are connected to the DE and RE pins of MAX481 respectively to control the driver and receive enable end. These four pins are all connected to pull-up resistors. [page]

　　The A and B terminals of MAX481 are the input and output terminals of RS-485 differential signals. A 120 Ω resistor is connected in series between the two.

　　1.2 Wiegand signal processing

　　Wiegand codes have multiple data formats. This article introduces the commonly used Wiegand code (26-bit) data format in readers and writers. The international standard Wiegand26 format only transmits 26 bits of data (binary) each time. Only 24 of these 26 bits are valid data. We stipulate that these 24 bits correspond to the lower 24 bits of the number in the electronic tag. Its transmission format is as follows:

　　Table 2 describes the Wiegand data format in detail. Bits 2 to 9 are group codes, which have 8 binary bits and 256 states; bits 10 to 25 are identification codes, which have 16 binary bits and 65,536 states; bit 1 is the even parity bit for bits 2 to 13; bit 26 is the odd parity bit for bits 14 to 25.

　　Due to the particularity of Wiegand signals, in general applications, the analysis of Wiegand signals is completed using FPGA. This article uses the following special method to process Wiegand signals. In Figure 4, 74HC14 is a Schmitt inverter, which mainly plays a shaping role; 74HC86 is an XOR gate. According to the characteristics of Wiegand signals, the signals input by data0 and data1 are always opposite, so the "0" and "1" appearing at the data0 and data1 ends can be detected through the first-level XOR gate. One end of the second-level XOR gate is connected to VCC, which only plays an inverting role to generate an interrupt signal suitable for SPCE061A; the output is connected to the interrupt input terminal IOB2 (INT0) of SPCE061A. After inverting and shaping, data1 is connected to IOB3 (INT1) of SPCE061A. SPCE061A can read the signal to determine whether it is "0" or "1".

　　2 System Software Design

　　When designing the system software, you must first configure the pins of SPCE061A and assign IOB2 and IOB3 as external interrupt 1 and external interrupt 0, so that SPCE061A can better capture the external Wiegand signal. The initialization procedure is as follows:

　　Since the width of the data pulse is relatively narrow, in order to avoid errors in the read data, the EXT1 signal on IOB2 should be captured before the interrupt signal on IOB3 is generated.

　　Conclusion

　　The biggest advantage of this system is that it can quickly and conveniently analyze and process various signals of the reader. Through the additional LCD display and voice prompts, the system can detect the ID signal read by the reader at any time. This process can reduce the tedious work of product testers, and can also increase the external promotion of reader products, greatly improve production efficiency and promote sales.