AT89C51 is a low-voltage, high-performance CMOS 8-bit microprocessor with 4K bytes of flash programmable and erasable read-only memory (FPEROM), commonly known as a single-chip microcomputer. The device is manufactured using ATMEL's high-density non-volatile memory manufacturing technology and is compatible with the industry-standard MCS-51 instruction set and output pins. As it combines a multifunctional 8-bit CPU and flash memory in a single chip, ATMEL's AT89C51 is an efficient microcontroller that provides a flexible and inexpensive solution for many embedded control systems.
1. Main features:
Compatible with MCS-51
4K bytes of programmable flash memory
Lifespan: 1000 write/erase cycles
Data retention period: 10 years
Fully static operation: 0Hz-24Hz
Three-level program memory lock
128*8-bit internal RAM
32 programmable I/O lines
Two 16-bit timer/counters
5 interrupt sources
Programmable serial channel
Low power idle and power-down modes
On-chip oscillator and clock circuit
2. Pin description:
VCC: power supply voltage.
GND: Ground.
P0 port: P0 port is an 8-bit open-drain bidirectional I/O port, each pin can absorb 8TTL gate current. When the pin of P1 port is written as 1 for the first time, it is defined as high-impedance input. P0 can be used for external program data storage, and it can be defined as the eighth bit of data/address. When programming FIASH, P0 port is used as the original code input port. When FIASH is verified, P0 outputs the original code. At this time, the external P0 must be pulled high. [page]
P1 port: P1 port is an 8-bit bidirectional I/O port with an internal pull-up resistor. The P1 port buffer can receive and output 4TTL gate current. After the P1 port pin is written to 1, it is internally pulled up to high and can be used as an input. When the P1 port is externally pulled down to a low level, it will output current. This is due to the internal pull-up. During FLASH programming and verification, the P1 port is received as the eighth address.
P2 port: P2 port is an 8-bit bidirectional I/O port with an internal pull-up resistor. The P2 port buffer can receive and output 4 TTL gate currents. When the P2 port is written "1", its pin is pulled high by the internal pull-up resistor and used as input. And therefore, when used as input, the pin of the P2 port is pulled low externally and outputs current. This is due to the internal pull-up. When the P2 port is used to access the external program memory or the 16-bit address external data memory, the P2 port outputs the upper eight bits of the address. When the address "1" is given, it takes advantage of the internal pull-up. When reading and writing the external eight-bit address data memory, the P2 port outputs the contents of its special function register. The P2 port receives the upper eight-bit address signal and control signal during FLASH programming and verification.
P3 port: P3 port pins are 8 bidirectional I/O ports with internal pull-up resistors, which can receive and output 4 TTL gate currents. When "1" is written to P3 port, they are internally pulled up to a high level and used as input. As input, due to the external pull-down to a low level, P3 port will output current (ILL) due to the pull-up.
Port P3 can also be used as some special function ports of AT89C51, as shown in the following table:
Port pin alternative function
P3.0 RXD (serial input port)
P3.1 TXD (serial output port)
P3.2 /INT0 (external interrupt 0)
P3.3 /INT1 (external interrupt 1)
P3.4 T0 (timer 0 external input)
P3.5 T1 (timer 1 external input)
P3.6 /WR (external data memory write strobe)
P3.7 /RD (external data memory read strobe)
Port P3 receives some control signals for both flash programming and programming verification.
RST: Reset input. When the oscillator resets the device, the RST pin must be kept high for two machine cycles.
ALE/PROG: When accessing external memory, the output level of the address latch enable is used to latch the status byte of the address. During FLASH programming, this pin is used to input programming pulses. Normally, the ALE terminal outputs a positive pulse signal with a constant frequency period, which is 1/6 of the oscillator frequency. Therefore, it can be used as a pulse for external output or for timing purposes. However, it should be noted that: whenever used as an external data memory, an ALE pulse will be skipped. If you want to disable the output of ALE, you can set it to 0 at the SFR8EH address. At this time, ALE will only work when executing MOVX, MOVC instructions. In addition, the pin is slightly pulled up. If the microprocessor is in the external execution state ALE is disabled, the setting is invalid.
/PSEN: The selection signal of the external program memory. During the instruction fetch from the external program memory, /PSEN is valid twice in each machine cycle. However, when accessing the external data memory, these two valid /PSEN signals will not appear.
/EA/VPP: When /EA is kept low, the external program memory (0000H-FFFFH) is used during this period, regardless of whether there is an internal program memory. Note that in encryption mode 1, /EA will lock the internal program memory to RESET; when the /EA terminal is kept high, the internal program memory is used during this period. During FLASH programming, this pin is also used to apply 12V programming power (VPP).
XTAL1: Input of the reverse oscillation amplifier and input of the internal clock working circuit.
XTAL2: Output from the inverting oscillator.
3. Oscillator characteristics:
XTAL1 and XTAL2 are the input and output of the reverse amplifier respectively. The reverse amplifier can be configured as an on-chip oscillator. Both crystal oscillation and ceramic oscillation can be used. If an external clock source is used to drive the device, XTAL2 should not be connected. The excess input to the internal clock signal must pass through a divide-by-two trigger, so there is no requirement for the pulse width of the external clock signal, but the width of the high and low levels of the pulse must be guaranteed.
4. Chip erase:
Electrical erasure of the entire PEROM array and the three lock bits can be accomplished by the correct combination of control signals and keeping the ALE pin at a low level for 10ms. In the chip erase operation, the code array is written with all "1"s and this operation must be performed before any non-empty storage byte is reprogrammed.
In addition, the AT89C51 has steady-state logic, which can be static logic under low to zero frequency conditions, and supports two software-selectable power-down modes. In idle mode, the CPU stops working. However, the RAM, timer, counter, serial port and interrupt system are still working. In power-down mode, the contents of RAM are saved and the oscillator is frozen, and all other chip functions are disabled until the next hardware reset.
Many netizens who are new to 51 microcontrollers have this question: What is AT89S51? Books and online tutorials all mention 8051, 89C51, etc. I've never heard of 89S51?!
Here, beginners need to clarify a product concept in the actual use of microcontrollers. The MCS-51 microcontroller was launched by the American INTE company in 1980. Typical products include 8031 (no internal program memory, and has been eliminated by the market in actual use), 8051 (the chip uses HMOS, the power consumption is 630mW, which is 5 times that of 89C51, and has been eliminated by the market in actual use) and 8751 and other general products. Until now, microcontrollers compatible with the MCS-51 core series are still the mainstream products used (such as the currently popular 89S51, the discontinued 89C51, etc.), and the training materials of various universities and professional schools still use the MCS-51 microcontroller as a representative for theoretical basic learning.
Some documents even refer to 8051 as the MCS-51 series of microcontrollers. 8051 is the most typical representative work in the early days. Due to the far-reaching influence of the MCS-51 microcontroller, many companies have launched compatible series of microcontrollers. That is to say, the MCS-51 core has actually become a standard for 8-bit microcontrollers.
The 51 MCU products of other companies are all compatible with the MCS-51 core. The same program will have the same results when running on the hardware of various MCU manufacturers, such as ATMEL's 89C51 (discontinued), 89S51, PHILIPS, and WINBOND. The discontinued 89C51 we often refer to ATMEL's AT89C51 MCU, which has enhanced many features on the original basis, such as the clock. What's more, the original ROM (one-time write) is taken from the Flash (the contents of the program memory can be rewritten at least 1,000 times) memory. The performance of AT89C51 is already very superior to 8051.
However, in terms of marketization, 89C51 has been challenged by the PIC microcontroller camp. The most fatal flaw of 89C51 is that it does not support the ISP (online update program) function. New functions such as ISP function must be added to better continue the legend of MCS-51. 89S51 replaced 89C51 in this context. Now, 89S51 has become the new darling in the actual application market. Atmel, which has the largest market share, has stopped producing AT89C51 and will replace it with AT89S51. 89S51 has been improved in terms of process. 89S51 adopts 0.35 new process, which reduces costs and improves functions, increasing competitiveness. 89SXX can be compatible with 89CXX and other 51 series chips. At the same time, Atmel no longer accepts orders for 89CXX. The 89C51 you see in the market is actually a huge inventory produced by Atmel in the early stage.
The new features of 89S51 compared to 89C51 include:
-- Many new functions have been added, the performance has been greatly improved, but the price remains basically the same, even lower than 89C51!
-- ISP online programming function. The advantage of this function is that it does not need to remove the chip from the working environment to rewrite the program in the microcontroller memory. It is a powerful and easy-to-use function.
-- The operating frequency is 33MHz. As we all know, the maximum operating frequency of 89C51 is only 24M, which means that S51 has a higher operating frequency and thus a faster computing speed.
-- Has a duplex UART serial channel.
-- Internally integrated watchdog timer, no need for external watchdog timer unit circuit like 89C51.
-- Dual data indicator.
-- Power off indicator.
-- Brand-new encryption algorithm makes it impossible to decrypt 89S51, greatly enhancing the confidentiality of the program, thus effectively protecting intellectual property rights from infringement.
-- Compatibility: Fully backward compatible with all 51-bit products. For example, 8051, 89C51 and other early MCS-51 compatible products. In other words, all programs in textbooks and online tutorials (regardless of whether the microcontroller used in the textbook is 8051, 89C51 or MCS-51, etc.) can run normally on 89S51. This is the so-called backward compatibility.
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