Single chip microcomputer circuit design based on PSD series chips

1. Hardware composition of traditional single-chip microcomputer system

For the hardware structure of traditional industrial control single-chip microcomputer systems, although typical microcontrollers (such as: 8031, 8098, 90C32, Z8, M68010, TMS320CXX, etc.) have integrated counters, a small amount of RAM and ROM, and limited I/O capabilities, most microcontrollers still need external EPROM, RAM, I/O ports and memory space decoding logic, and sometimes external latches are needed to separate the address and data from the multiplexed address/data bus. Circuit designers have to choose chips to form the circuits they want to design according to their own needs. Once the circuit design is completed, it is troublesome to modify it. If the PSD series chips are used as peripheral chips of the single-chip microcomputer, the above problems can be well solved.

2. Hardware composition of the single-chip microcomputer system using PSD chip

WSI produces a high-performance field programmable microcontroller peripheral integrated circuit (PSD) series that integrates EPROM, RAM, PLD, address latch and I/O port on a single chip. With the emergence and development of the PSD series of chips, designers no longer have to think about which discrete devices are needed to form the memory, decoding circuit, port and address latch required by the system. This high concentration of functions within the chip reduces the components of a small system to only two chips: a microcontroller and a PSD chip. This two-chip solution of hardware design can not only simplify circuit design, save printed board space, shorten product development cycle, but also increase system reliability and reduce product power consumption. Of course, for larger systems, multiple PSD chips can be configured without the need for external logic circuits. Two or more PSD chips can be cascaded horizontally (to increase bus width) or vertically (to increase subsystem depth) to increase the system's memory space, I/O ports and chip select signals to meet the system's requirements.

3. Introduction to the internal structure and functions of PSD series chips

PSD series chips (mainly PSD3, PSD4, PSD5, PSD6, PSD8, PSD100, etc.), the most commonly used are PSD3 and PSD100 series chips.

The main structure and functions of the PSD3 series chips are shown in the following aspects:

(1) Data bus The data bus of PSD3 is 16 bits. Through configuration, it can work in both 8-bit and 16-bit modes; it can work in both address/data multiplexing mode and non-multiplexing mode.

(2) Addressing space The address bus of PSD3 is A0~A19, and the addressing space can reach 1MB. What is particularly important is that the PSD3 series chips contain two programmable address decoders (PADA and PADB), which are manufactured using reprogrammable CMOSEPROM technology and can be programmed and erased by users, similar to GAL devices. This programmable array has 12 input items (some chips have 16), 24 output items, and 40 product items. PADA is mainly used to generate the signals required for chip selection of the EPROM and SRAM inside the PSD3 chip. It is programmed by address (A11~A19), read and write logic and other signals. The input of PADB is the same as that of PADA, but its output is output to ports B and C for off-chip use to select external devices or as random logic replacement. The replaceability and randomness of this logic enable PSD3 to configure the outputs of PADA and PADB in different ways to adapt to different types of microcontroller chips, as shown in Figure 1. To configure the PSD3 series chips, you only need to run the PSDsoft-Lite software package in the WINDOWS environment and connect the PEP300 programmer through the printer port. The operation is very simple.

(3) I/O pins PSD3 has 19 I/O pins, divided into three ports A (PA0~7), B (PB0~7) and C (PC0~2), which can be configured and used separately. Its flexibility allows the PSD3 chip to interface with shared resources and can also be used as an extension of the microcontroller's I/O port. When port C is configured as input, it can be used as the input of address A16~18; when it is configured as output, it can be used as the output of address decoder PADB. The working mode of ports A and B is more flexible than port C, and different configurations can be made for different microcontrollers. If the microcontroller is an address/data multiplexing type, PSD3 is its peripheral interface chip. If the data line of the microcontroller is 8 bits, its multiplexed address/data line is directly connected to AD0~7 of PSD3; if it is 16 bits, it is directly connected to AD0~15 of PSD3. At this time, both port A and port B can be configured as I/O ports. If the microcontroller is not of address/data multiplexing type, PSD3 is used as its peripheral interface chip. The address line of the microcontroller is directly connected to AD0~15 of PSD3. If its data line is 16 bits, the upper 8 bits are connected to port B and the lower 8 bits are connected to port A. If it is 8 bits, it is directly connected to port A of PSD3. At this time, port A is configured as a data bus as shown.

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(4) On-chip EPROM The on-chip 256k-bit EPROM can be configured as 32k×8 or 16k×16. It is divided into 8 equal mappable memory blocks for optimized address decoding. Each memory block has a structure of 4k×8 or 2k×16, which is selected by the PADA outputs ES0 to ES7. The memory access time is 90ns, including the input latch and PAD address decoding time.

(5) On-chip RAM On-chip 16k static RAM: can be configured as 2k×8 or 1k×16, selected by the PADA output RSO. Its access time is also 90ns, including the time for input latching and PAD address decoding.

(6) On-chip encryption can realize the configuration encryption of the PSD3 series chips and the decoding encryption of the PAD. Since traditional hardware circuits are composed of scattered parts, it is relatively easy to decipher the circuit design by testing a single device. However, the high integration of the PSD3 series chips and their own encryption function make the circuit and program impossible to decipher.

The remaining PSD series chips are more powerful than PSD3 in terms of functions, mainly in terms of the increase in I/O pins, the expansion of EPROM and SRAM capacity, and the input, output and product terms of PLD. For example: PSD503, I/O pins are 40, PLD inputs are 61, product terms are 140, interrupts are 8 levels, timers/counters are 4, EPROM is 1M, SRAM is 16k, and it has a backup battery. Another example: PSD813F1 is an in-system programmable device that does not require a hardware programmer and can configure all functional blocks in the entire chip and write program EPROM.

4. Application Examples

Example 1: At present, the 8031 ​​series of microcontrollers are particularly widely used. PSD312 and 8031 ​​are used to form the hardware core of the microcontroller. 8031 ​​uses signals to access the program memory in PSD312 and reads and writes the data memory of PSD312. The program memory of PSD312 is configured into 8 8k×8 memory blocks, and the data memory is configured into a 2k×8 memory block. Because the address decoding space is 64k, PC0, PC1, and PC2 are configured as I/O ports, and A16, A17, and A18 are not used. Because 8031 ​​works in 8-bit data/address multiplexing mode, PSD312 is configured in 8-bit data/address multiplexing mode, and port A is also configured as an I/O port.

Example 2: In the field of digital signal processing, the microcontroller TMS320 series chips are widely used. Using the PSD100 chip as the peripheral interface chip of the TMS320C25 to form the core circuit of the single-chip microcomputer for digital signal processing is much simpler than the previous one made of scattered parts. PSD100 is a dedicated peripheral interface chip for the digital signal processor (DSP). It is a non-data/address multiplexing type and can be connected to a microcontroller with an 8-bit or 16-bit data bus. It has a 128k-bit EPROM and a 32k-bit SRAM, and the memory access time is 32ns. In Figure 3, PSD100 is configured into eight 1k×16 EPROMs and two 1k×16 SRAMs. TMS320C25 uses PS to select the program memory of PSD100. Use DS to select the data memory of PSD100. Since PSD100 does not have a dedicated pin for the read pulse input of the on-chip EPROM (unlike the PSD3XX series chips), for PSD100, its program and data memory are in the same storage space. Therefore, connect PS to A18 and DS to A17, and use different address space mappings to select program and data memory.

5. Conclusion

At present, the functions and advantages of the PSD series chips have not been recognized by many people. Most people are still accustomed to using scattered parts to construct microcontroller peripheral circuits. This way of thinking will inevitably change with the popularization and application of the PSD series chips.