Audio processing solution and circuit description based on LPC2214 and uC/OS-II

Embedded platform based on LPC2214 and uC/OS-II

Currently popular ARM chip cores include ARM7TDMI, ARM720T, ARM9TDMI, ARM992T, ARM940T, ARM946T, ARM966T and ARM10TDMI. Philips LPC2214 is a high-performance 32-bit RISC microcontroller based on ARM7TDMI-S. It integrates Thumb extended instruction set, 256KB on-chip Flash programmable in the system and 16KB programmable in the application. RAM, vector interrupt controller, external bus controller, 2 UARTs, I2C serial interface, 2 SPI serial interfaces, 2 timers (7 capture/compare channels), a PWM unit with up to 6 PWM outputs, 8-channel 10-bit ADC, real-time clock, watchdog timer and 112 general-purpose I/O pins. The LPC2214 can achieve a CPU clock frequency of up to 60MHz through a programmable on-chip phase-locked loop (PLL). Compared with many ARM series products, the LPC2214 produced by Philips is a cost-effective ARM7 chip.

Embedded real-time operating systems help improve system reliability and development efficiency, and can give full play to the multi-tasking capabilities of 32-bit CPUs. Common embedded operating systems include Linux, Windows CE, VxWorks, Nucleus, uC/OS-II, etc. Among them, uC/OS-II is a portable, curable, and customizable preemptive real-time operating system. Its peripheral supporting products are also relatively complete, such as uC/FS, uC/GUI and other products have enhanced the applicability of its application. Compared with other operating systems, uC/OS-II only needs a dozen or dozens of KB of Flash space and SRAM space for normal operation, and the licensing fee required is relatively low. Combined with the hardware platform with LPC2214 as the core, uC/OS-II is used here as the embedded operating system of the device.

From the above analysis, it can be seen that choosing an embedded platform that combines LPC2214 and uC/OS-II is a more economical and practical method.

2. Selection of audio decoding chip

The platform combining LPC2214 and uC/OS-II has relatively powerful processing capabilities, but it is still insufficient in many applications. In the application introduced in this article, the system needs to have audio codec functions. The audio codec methods include software codec and hardware codec. If software codec is used, the processing speed requirement for the processor is generally above 50MIPS, while the processing speed of LPC2214 is only about 70MIPS. Obviously, if this method is used, the processing capacity of LPC2214 will be greatly limited. Therefore, using a dedicated audio processing chip to process audio data is a correct choice for this platform. Here, a high-performance audio decoding chip--VS1003 is selected.

The VS1003 audio decoding chip is the third generation product of the VS10XX series. It is a single-chip MP3/WMA/MIDI decoding and ADPCM encoding chip produced by VLSI Solution Oy of Finland. It contains a high-performance, low-power DSP processing core (VSDSP), a working memory, a 5.5KB RAM for user programs, a serial SPI bus interface, a high-quality oversampling DAC with adjustable sampling frequency, and a 16-bit sampling ADC. The internal structure of VS1003 is shown in Figure 1.

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3 Implementation of VS1003 Control Protocol

VS1003 communicates data and control information with the host through an SPI serial bus working in slave mode. Audio data is transmitted through the serial data interface (SDI) and control data is transmitted through the serial control interface (SCI). The control data is always 16 bits and the control of VS1003 is achieved by reading/writing different registers.

The SPI interface of VS1003 has two working modes: VS1002 new mode and VS1001 compatible mode. Set SM_SDINEW to 1 to put VS1003 in VS1002 new mode. When SMSDISHARED is 0, the transmission of control signals and data signals uses xCS and xDCS as synchronization signals respectively, and when SMSDISHARED is 1, xCS is shared as the synchronization signal. Set SM_SDINEW to 0 to put VS1003 in VS1001 compatible mode, in which only xCS is used as the synchronization signal.

As a slave working mode, VS1003 indicates whether the host is allowed to transmit data through a signal line DREQ. When DREQ is high, VS1003 can accept at least 32KB of SDI data or SCI control commands.

Here, we take the new mode of VS1002 and SMSDISHARED set to 0 as an example to introduce the implementation of VS1003 communication protocol. Figure 2 describes the SDI working sequence, which uses xDCS as the synchronization signal. As the clock signal DCLK changes, the data is sent out from the high or low position in turn according to the setting of SCL_MODE.

The SCI protocol includes 1 control instruction byte, 1 address byte and 1 16-bit data word. Each read and write control can operate one register. The read command and write command are 0x03 and 0x02 respectively. The working timing of these two control commands are shown in Figure 3 and Figure 4 respectively.

4 Circuit Design

The ultimate goal of this design is to create an industrial control handheld device with a human-machine interface and data storage functions. Control commands are sent through the human-machine dialogue interface to manipulate VS1003 to achieve recording and playback functions.

4.1 Hardware Circuit Design

All data and control commands of VS1003 are implemented through the SPI bus interface, so the interface with LPC2214 is relatively simple, including 3 SPI data lines and 4 control lines, as shown in Figure 5.

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4.2 Software Design

The control software design of VS1003 is carried out under the condition that the system has successfully transplanted the uC/OS-II operating system and the ZLGFS file system. In the specific software design, firstly, several functional pins of the LPC2214 and VS1003 control interface are configured accordingly, and then SPI is enabled and its working mode is set. After that, a special task is established to realize the recording and playback function of the system by using the characteristics of uC/OS-II multi-tasking. After the task is created, the initialization of VS1003 is completed first, and then the task enters the waiting loop, waiting for the system to issue the corresponding control instruction. When the task receives the recording instruction, the corresponding recording function function is called to start the recording function and write the recording data to the specified file. When the playback function instruction is received, the playback function function is called to play the specified audio file. When the interrupt instruction is received, the recording and playback function will be exited and the task will return to the loop waiting. The specific implementation function of the task is as follows:

5 Conclusion

VS1003 is used to implement the audio codec function of the embedded platform based on LPC2214 and uC/OS-II. The interface circuit is simple, the control program is easy to write, and the final audio playback is clear and natural. Of course, some problems that need attention have been encountered in the specific design. For example, to successfully initialize VS1003, it is necessary to understand the configuration timing requirements of VS1003 in detail. In particular, it should be noted that the waiting processing cycle for different register configurations is different. If the waiting cycle is not enough, the configuration will not be completed normally.