Various knowledge analysis solutions related to the single-chip monitoring chip X25043

1. Preface

X25043 is a single-chip monitoring chip from XICOR. It combines four commonly used functions: power-on reset, watchdog timer, voltage monitoring and serial EEPROM functions into a single package. This combination reduces system cost and board space requirements. The following will introduce their functions separately.

2. Principle of X25043

X25043 integrates multiple functions. Figure 1 is its functional block diagram:

Figure 1 X25043 block diagram

/WP is the write protection of X25043, which is valid at low level.

SI is the serial data input port, and the rising edge of the serial clock is valid.

SO is the serial data output port, and the falling edge of the serial clock is valid.

SCK is the serial clock, which is used to control the I/O of serial data.

/CS is the chip select signal, low level is valid.

VCC is the power supply.

/RESET is the output reset signal, which is valid at low level.

2.1 Power-on reset and voltage monitoring functions

In the application of single-chip microcomputer system, the reset circuit needs to provide at least 2 states of valid reset signals after the power supply VCC and the oscillator are stable, which is a low-level signal for X25043. X25043 can provide a valid low-level signal for 200ms after the power supply and oscillator are stable, and then restore to a high-level signal. During operation, X25043 will always monitor the power supply VCC. When VCC drops to less than a preset voltage VTRIP, the /RESET output signal will be low, resetting the single-chip microcomputer system. The /RESET signal is still valid until VCC drops to 1V. The action when the power is restored is the same as the action when the power is reset. Among them, VTRIP can be reset through programming.

2.2 Watchdog Timer Function

The watchdog timer provides an independent protection system for the microcontroller. When the system fails, the X25043/45 watchdog will respond with a /RESET signal after an optional timeout period (timeout interval). The user can select this period from three preset values. Once selected, this period does not change even after the power cycle changes. In a normal microcomputer control system, the watchdog timer must be reset and the counting must be restarted after each control task is completed. For the X25043 chip, the watchdog can be reset by simply setting the /CS port level to a falling edge. The X25043 watchdog timer has three initial timing values ​​that can be selected, and the selection can be made by setting bits 2 and 3 of the status register.

2.3 Serial EEPROM Function

Electrically Erasable Programmable Read-Only Memory (EEPROM) can read out data online like EPROM. Because EEPROM has dedicated circuits for erasing and rewriting, it can be easily written and read online. The memory part of X25043/45 is a CMOS 4096-bit serial EEPROM, which is organized as 512×8 internally and can be block locked (Block Lock). Block lock can protect 1/4, 1/2 or all EEPROM arrays. After locking, it can only be read but not written. The characteristics of X25043/45 are serial peripheral interface (Serial Perpheral Interface, SPI) and software protocol that allow simple three-wire bus operation. X25043/45 uses Xicor's proprietary Direct WriteTM chip, providing a minimum endurance of 100,000 cycles/byte and a minimum data retention period of 100 years.

X25043 read and write operations

X25043 has an 8-bit command register to control its read and write operations. The operation command is written through the SI port. There are two write operation formats that require a command register, namely writing EEPROM data and writing status register. The read operation is through the SO port. X25043 also has two read formats that require a command register, namely reading EEPROM data and reading status register. As shown in Figure 2. For reading and writing the status register, the command register operation must be completed first, and then the data is read or written. For EEPROM operations, it is necessary to write the command register first, then perform I/O of the destination address, and finally the data operation. All operations are performed according to the SPI protocol under the SCK clock. The data I/O starts from the highest byte.

Figure 2 Command register format [page]

The format of the status register of X25043 is shown in Figure 3. WIP is a status indicator bit, which is readable only, indicating whether X25043 is currently busy with internal writing, which is very important in judging whether EEPROM writing is completed. The WEL bit indicates whether X25043 is currently writable. When WEL=0, X25043 cannot perform a write operation. The logical combination of BL0 and BL1 controls the block lock size of the EEPROM area. The logical combination of WD0 and WD1 determines the size of the watchdog counter timing value.

Figure 3 Status register format

3. Application of X25043 in MCU system

According to the function of X25043, we can use it in the single-chip system to expand the storage space, power-on reset, watchdog timing and power monitoring functions. Figure 4 is the interface circuit between X25043 and single-chip 8051. Schmitt trigger 74LS14 is used for clock pulse shaping to improve the ability to resist noise interference.

Figure 4 X25043 and 8051 interface circuit

Here we can set the watchdog timer value to 200ms by setting WD0 and WD1 in the status register. We must first write to the command register, and then write to the status register to set the watchdog counter value. The following is the specific assembly program (8051):

Write 8-bit data subroutine: (A puts in the 8-bit serial data to be written)

INSB: MOV R4, #8

IN1: RLC A

CLR P1.0; SCK clock is set low

NOP

NOP

MOV P1.1, C

SETB P1.0; SCK clock is set high, data is shifted in

NOP

NOP

DJNZ R4, IN1

RET

The procedure for setting the watchdog is as follows:

· · ·

SETB P1.3; Chip select valid

MOV A, #6 ;Write command WREN

LCALL INSB

MOV A, #1 ; write command WRSR

LCALL INSB

MOV A, #20H ;Write to status register, set watchdog

LCALL INSB

CLR P1.3; Chip select invalid

· · ·

4. Conclusion

The author used the X25043 chip when developing a robot control system, making full use of its power-on reset, voltage monitoring, watchdog timer and external EEPROM. This not only simplifies the hardware circuit and power-off data protection, but also improves reliability and anti-interference performance, making it very feasible to use.