Interface Design between Embedded Processor MPC8250 and CF Card

In recent years, embedded processors have been booming and have been widely used in the fields of communications, aerospace, medical equipment, consumer electronics, etc. The peripheral devices of embedded processors are also changing with each passing day, such as memory sticks, USB ports, CF cards, etc. This article introduces the design and use techniques of CF cards in embedded systems from the perspective of hardware and software.

Due to the advantages of CF card such as portability, easy upgrade, large storage capacity and good shock resistance, its application scope is becoming wider and wider. In October 1995, 125 manufacturers including SanDisk, Kodak, Casio, HP, Motorola and Canon initiated the establishment of Compact Flash Association, which is committed to formulating a new generation of solid-state non-volatile storage medium standard based on RAM and ROM technology - CF card standard, so that CF cards and their interface devices developed by different manufacturers can be compatible with each other. At present, the CF card standard has version 1.4, with a capacity ranging from the earliest 2M bytes to the current 1G bytes.

At the same time, CF cards comply with ATA-IDE industrial design standards, and the connection device is similar to PCMCIA cards, except that CF cards have 50 pins (PCMCIA cards have 68 pins), which can be easily inserted into passive 68-pin Type II adapter cards and fully comply with PCMCIA power and mechanical interface specifications. In addition, CF cards have good compatibility. Not only do they support 3.3V and 5V voltages at the same time, but different CF cards can be read and written with a single mechanism, especially when CF cards are upgraded, the compatibility of old devices can be guaranteed. The power consumption of pure electronic movement CF cards is very low, only 5% of IBM micro hard disks.

1 System Design

Figure 1 is the block diagram of the embedded system developed by the author. The embedded processor is MPC8250, and PCI1410A is an interface chip connecting PCI bus and CF card.

The MPC8250 chip is a PowerPC series embedded processor developed by Motorola. The chip uses a compact and powerful 32-bit superscalar architecture PowerPC 603e processor core with a maximum main frequency of 300MHz. It integrates components such as PCI bridge, PCI arbiter, memory controller, interrupt controller, DMA controller, 16K bytes instruction cache and 16K bytes data cache. The MPC8250 has three FCC ports that can be configured as 100M or 10M Ethernet, four SCC ports that can be configured as serial ports or network ports, and a multi-channel HDLC interface. The chip is suitable for applications that have high requirements for cost, space, power consumption and performance, such as routers/connectors, multi-channel MODEMs, network storage applications and image display systems.

The PCI1410A chip is a high-performance PCI to CF card controller developed by TI, which supports all kinds of CF cards that follow the CF card standard. It complies with the PCI bus standard and can work in both PCI master mode and PCI slave mode.

The MPC8250 and PCI1410A are connected via a 32-bit PCI local bus, operating at 33MHz. The MPC8250 is used as the PCI master, and the PCI1410A is used as the PCI slave, while the PCI arbiter inside the MPC8250 is used.

This design uses a CF card of SanDisk's model SDCFB-64-101, with a capacity of 64M bytes and a geometric size of 36.4mm×42.8mm×3mm. The connection between PCI1410A and the CF card follows the CF card standard and consists of three groups of signals: address, data, and control. PCI1410A provides five general I/O pins, and one of the pins GPIO1 is used as an LED indicator in the design. When the CF card is working, the LED will flash at a period of 64ms.

The SDRAM used is Samsung's K4S561632A, each with a capacity of 256M bits, and there are four in total.

Figure 2 Schematic diagram of the CF card reading and writing skills

2 Interface programming

Before the CF card works, it must be initialized first, determine the location of the CF card in the address space of the entire system, and pre-set the working mode and related registers of the CF card. In this design, the CF card is located in the system's 0x9A000000~0x9DFFFFFFF address space. Each time the CF card is read or written, the corresponding registers must be configured according to the amount of read or write data and the operating characteristics.

2.1 CF card initialization

In this system, the initialization of the CF card is realized by MPC8250 configuring the registers of PCI1410A through the PCI bus. The specific steps are as follows:

(1) Set the base address of the CF card, that is, configure the ExCA register (offset: 0x10). This register defines the base address of the CF card in the PCI memory space, that is, 0x9A000000.

(2) Configure the PCI command register (offset: 0x04) to allow the CPU to access the PCI storage space.

(3) Configure the system control register (offset: 0x80). This register defines some system control bits, such as whether to use the PCI interrupt mode, whether to use the internal oscillator, whether to use DMA, etc. This design uses the PCI interrupt mode and does not use the internal oscillator and DMA. [page]

(4) Configure the multi-function pin register (offset: 0x8C). This register configures the general purpose pins. This design configures the GPIO1 pin as an LED indicator and the GPIO2 pin as a PCI interrupt output.

(5) Configure the device control register (offset: 0x92). This register selects the interrupt mode, parallel PCI interrupt or serial PCI interrupt. This design chooses the traditional parallel PCI interrupt mode.

(6) Configure the ExCA voltage control register (offset: 0x802) to select whether Vcc is 3.3V or 5V. This design selects Vcc as 3.3V.

(7) Configure the low register of the starting address of ExCA storage window 0 (offset: 0x810), that is, bits A19 to A12 of the starting address. PCI1410A has five storage address translation windows and two I/O address translation windows, which are used to configure the access address of the registers in the CF card and map the registers of the CF card to the storage space or I/O space of the system. When the MPC8250 accesses these registers, it is equivalent to accessing a section of storage space or I/O space. In this design, only storage address translation window 0 is used.

(8) Configure the Exec storage window 0 start address high register (offset: 0x811), i.e., bits A23 to A20 of the start address.

(9) Configure the ExCA storage window 0 end address low register (offset: 0x812), that is, bits A19 to A12 of the end address.

(10) Configure the ExCA storage window 0 end address high register (offset: 0x813), that is, bits A23 to A20 of the end address.

(11) Configure the ExCA storage window 0 address comparison register (offset: 0x840). When the system accesses the CF card, if the high 8 bits of the address are the same as the value of this register, the access is allowed and the system translates the address to the corresponding CF card space; otherwise, the access is denied.

(12) Configure the ExCA storage window enable register (offset: 0x806). This register can open or close five storage address translation windows and two I/O address translation windows respectively, because each window corresponds to an enable bit in the register. The default value of the chip is closed. In this design, storage address translation window 0 is opened. Remember to open the translation window enable bit at the end of initialization to avoid failure.

2.2 Tips for reading and writing CF cards

Due to the characteristics of the CF card itself, the CF card consists of two parts: the ATA controller and the Flash memory. The speed of the system accessing the Flash memory is much slower than the speed of accessing the internal memory. If the system frequently accesses the CF card, it will inevitably affect the real-time performance and work efficiency of the system. Therefore, the design skills of the CF card reading and writing program must be considered.

According to the principle of locality of memory access, the storage units accessed by the CPU to access data tend to be concentrated in a small continuous area. From a temporal perspective, if an information item is being accessed, it is likely to be accessed again in the near future. From a spatial perspective, the information that will be used in the near future is likely to be adjacent to the information currently being used in terms of spatial address.

In the programming of this system, a sector memory space tempSect is opened to store the sector data that has been recently accessed; and two global variables are set: SaveSectorNum and SectionDirecty. SaveSectorNum saves the sector number of the most recent backup. SectionDirecty indicates whether the backup data is consistent with the corresponding data in the CF card. If consistent, it is "0"; otherwise, it is "1". This not only reduces the number of times the CF card is read and written, but also improves the access speed, meeting the real-time requirements of the embedded operating system.

At the same time, the physical structure of the CF card is also conducive to operating in sectors, because the Flash memory inside the CF card is composed of several sectors, and the CF card is equipped with registers specifically for sector operations.

Therefore, in this design, whether reading a piece of data or writing a piece of data, the sector is used as the basic unit. If the data volume is within a sector and the address range is in the same sector, the data in the sector is read first, and then the required data is obtained according to the offset in the sector; if the data volume is greater than one sector, or the address range spans two sectors, the sectors are read one by one to obtain the required data. The operation flow is shown in Figure 2.

When the system is initialized, SaveSectorNum is set to "0", and the data in sector 0 is backed up in tempSect; SectorDirecty is also "0", which means that the backup data is not changed.

When reading data from a sector, first compare the read sector number (CurrSectorNum) to see if it is consistent with the sector number of the backup data (SaveSectorNum). If they are consistent, read from the backup data to speed up the access speed; otherwise, determine whether the backup data has been changed, that is, whether SectionDirecty is "1"; if not, read the data with sector number CurrSectorNum from the CF card into tempSect; otherwise, write the data in tempSect back to the CF card first, and then read the data with sector number CurrSectorNum from the CF card into tempSect. Finally, set the backup data sector number SaveSectorNum to the current data sector number CurrRSectorNum, set SectionDirecty to "0", and read the required data from the backup data. [page]

When writing data to a sector, first compare the written sector number (CurrSectorNum) to see if it is consistent with the sector number of the backup data (SaveSectorNum). If they are consistent, write the data to the backup data and set SectionDirecty to "1"; otherwise, determine whether the backup data has been changed, that is, whether SectionDirecty is "1"; if not, read the data with sector number CurrSectorNum from the CF card into tempSect; otherwise, write the data in tempSect back to the CF card first, and then read the data with sector number CurrSectorNum from the CF card into tempSect. Finally, set the backup data sector number SaveSectorNum to the current data sector number CurrRSectorNum, write the specified data to the backup data, and set SectionDirecty to "1".

2.3 Registers related to reading and writing data

According to the CF card standard, the data area of ​​the CF card cannot be accessed directly, but data must be read or written indirectly by accessing the relevant registers in the CF card (the base addresses of these registers are configured when the CF card is initialized, see Section 2.1). They must be configured correctly when accessing the CF card:

(1) Sector Number Register (Sector_CNT Register)

During read and write operations, this register stores the number of sectors to be transferred. If it is 0, 256 sectors are selected; if the operation is successful, this register is 0 at the end of the operation; if the operation is unsuccessful, this register contains the number of sectors to be completed.

(2) Head register (Select_HEAD Register)

It contains the LBA bit (1 bit) which is used to set the address access mode. "1" (LBA_Mode) is the logical address access mode, and "0" is the cylinder/head/sector access mode. If the system selects the logical address access mode, the register also contains bits 24 to 27 of the logical address.

(3) Sector number register (Sector_NUM Register)

When the logical address access method is used, this register contains bits 0 to 7 of the logical address.

(4) Cylinder low register (Cylinder_LO Register)

When using the logical address access method, this register contains 8 to 15 bits of the logical address.

(5) Cylinder high register (Cylinder_HI Register)

When using the logical address access method, this register contains bits 16 to 23 of the logical address.

(6) Status Register

Reflects the status of the CF card, including the CF card busy bit (Busy), error bit (Err), ready bit (Rdy), etc.

(7) Data Register

Stores read and write data, which is a 16-bit register.

2.4 Reading Data

Read a sector of data from the CF card, as shown in Figure 3. Because the sector size of the CF card used by the system is: SectorSize = 512 bytes, assuming that the address of the read and write data is Addr, the sector number of the address is:

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First, configure the registers, set the number of sectors to be read, the corresponding addresses and the access mode; then send a read command (0x20), wait for the CF card to be idle and ready, and then continuously read the data of a sector from the data register; after completing the reading, wait for the CF card to be idle; the program returns.

2.5 Writing Data

The operation of writing data to a CF card is similar to the operation of reading data from a CF card, as shown in Figure 4. First, configure the register to set the number of sectors to be written, the corresponding address, and the access mode; then send a write command (0x30), wait for the CF card to be idle and in the ready state, and continuously write a sector of data to the data register; after completing the writing, wait for the CF card to be idle, and the program returns.

The operating system used in this design is μC/OS, an embedded operating system with fully open source code. All functions for reading and writing CF cards are compiled in C language and can work effectively in the system.