Software Simulation of SPI Interface in Embedded Home Gateway

introduction

With the development of the information society, the Internet and information appliances are increasingly appearing in people's lives. People generally require that all home appliances in the home be connected to the Internet, so that the owner can monitor the home appliances remotely through the Internet using a computer or phone. Home appliance manufacturers can provide after-sales tracking services for their equipment through the Internet; when home appliances fail, they can automatically send emails to the preset email address to alarm. This requires a "home network central controller". It is connected to the Internet externally and connects all home appliances into one through the wireless LAN inside the home, thereby ensuring that information appliances are safely connected to the Internet. At present, most home network intelligent controllers launched by research units use PCs or quasi-PCs as hardware platforms, and are not accepted by the market due to their high prices.

Embedded Internet is an emerging technology developed in recent years. With 32-bit ARM embedded microprocessor as hardware platform, by transplanting embedded operating system uClinux kernel, developing corresponding hardware driver, micro GUI and upper application software, finally realize the productized embedded home network central controller. The system has the characteristics of small size, low power consumption and low price.

1 System hardware composition

This system uses the high-performance, low-cost S3C4510B as the main CPU. It is a 32-bit high-speed microprocessor based on the ARM7TDMI core and a streamlined instruction set launched by Samsung. The operating voltage is 3.3V, and the operating voltage of the core ARM7TDMI is 2.5V, which greatly reduces the power consumption of the chip. S3C4510B on-chip resources: a bus arbitrator can allocate system bus control rights between on-chip functional modules and peripheral devices according to the bus arbitration priority; 8KB instruction and data multiplexing cache, each 128bit is 1 page, and can be set to SRAM in whole or in part; 1 master I2C bus controller, which can be used as a master transmitter or master receiver and can connect multiple slave devices; 2 general-purpose DMAs; 18 general-purpose I/O ports; 2 4-wire UART ports, one of which supports IrDA 1.0 and can be used for infrared communication; 6 groups of ROM/SRAM/Flash are used to manage external memory. In addition, it can expand 4 groups of dynamic memory and 4 BANK expansion I/O devices; 2 channels of HDLC port with DMA transfer mode; 1 10M/100M adaptive Ethernet controller.

Figure 1 is the hardware block diagram of the home gateway, which uses S3C4510B as the basic core system and a series of functional modules are expanded on the periphery. There is a 4×4 keyboard and a screen LCD display to form a good human-machine interface for manual local parameter query and setting. The home gateway basic system is connected to the PTR3000 wireless transceiver module through the SPI interface, and the home appliance controller inside the home also expands the PTR3000 wireless module through the SPI interface. In this way, the wireless module of the home gateway communicates with the wireless modules on each home appliance controller in the home in a polling manner, thereby forming a wireless subnet inside the home. The home gateway basic system only needs to operate the SPI port to achieve communication with home appliances. Three paths for home appliances to interconnect with the Internet at the physical layer through the home gateway as the intermediary are realized: the PC is connected to the Ethernet port of the basic system through the LAN via the Internet, the PC is connected to the embedded Modem through the company telephone network through the Modem and then to UART1, and the telephone is connected to UART1 through the public telephone network via the voice card.

2 uClinux embedded operating system

The operating system is uClinux. It is a fully open source project that fully complies with the GNU (GNU's Not Unix, Free Software Foundation)/GPL (General Public License) convention. It is a branch of standard Linux and is now supported and maintained by Lineo. It is specifically designed for CPUs without MMU and has done a lot of miniaturization work for embedded systems. [page]

UClinux is a highly optimized, compact embedded Linux kernel that has been modified from the standard Linux kernel. Although it is small in size, uClinux still retains most of the advantages of Linux, including stability, good portability, excellent network functions, complete support for various file systems, and rich standard APIs. Its main features are as follows:

① Add 1 line in linux-2.4.x/driver/char/Makefile: obj_$(CONFIG_SPI)+=SPI.0. Add PI.o after obj-y+=mem.o tty_io.o in line 24.

②In linux-2.4.x/driver/char/Config.in, add 1 line: bool\'SPI\'CONFIG_SPI for easy selection during make me nuconfig.

③In linux-2.4.x/driver/char/mem.c, add the following to the file header: #ifdef CONFIG_SPI /*Select this option during compilation to execute the SPI initialization function*/

extern void SPI_init(void);

#endif

Add in chr_dev_init() function: #ifdef CONFIT_SPI

SPI_init();

#endif

④Modify vendor/Samsung/4510b/Makefile and create the device node.

In the DEVICE section between lines 12 and 35, add SPI, c, 29, 0. SPI is the device name, c represents character device, 29 is the major device number of SPI, and 0 is the minor device number of SPI. ⑤ Select SPI compilation when making menuconfig, and then load directly.

After booting, you will see an additional character device in /proc/devices: SPI 29.

S3C4510B has 18 general I/O ports, of which the upper 10 bits can be set to other function ports. In this system, P8 is set as the interrupt receiving line, P11 simulates the host output line MOSI, P12 simulates the host clock SCK, and P13 simulates the host input line MISO. Port P8 is used to receive the send request signal of PTR3000. When port P8 receives the request signal, the system enters the interrupt processing. The interrupt processing process wakes up the reading process sleeping on the sleep queue SPI_WAIT, and the reading process outputs the SCK signal from port P12 and reads the data from port P13. It is worth mentioning that SPI does not have an interrupt line. The purpose of using port P8 as the interrupt receiving line here is to avoid the operating system from continuously sending clock signals to the SCK line when no SPI operation is performed. Therefore, MSP430F147IPM must be connected to S3C4510B with a pin to send an interrupt receiving line when requesting to send data in order to avoid the operating system from continuously sending clock signals to the SCK line when no SPI operation is performed. Therefore, the MSP430F147IPM must be connected to an additional pin of the S3C4510B to send an interrupt request signal when requesting to send data. The implementation process is as follows:

Static wait_queue_head_wait; //Sleep queue

//Read function

static ssize_t SPI_onlyread(struct file*file,char *buf,size_t count,loff_t *ppos)

{

interruptible_sleep_on(&SPI_wait); //Read process sleeps and waits for read interrupt signal

if(count>BUFNUM)count=BUFNUM;

for(num=0;num

for(i=0;i<8;i++){

iopdata=iopdata^0x1000; //clock output

SPI_read[num]=SPI_read[num]+((iopdata&0x2000)>>(12-i)); //Data input

}

}

if(copy_to_user(buf,&SPI_read,count)) //Copy data from kernel space to user space

return-EFAULT;

return count;

}

//Write function

static ssize_t SPI_onlywrite(struct file *file,const char *buf,size_t count,loff_t *ppos)

{

if(count>BUFNUM)count=BUFNUM;

if(copy_from_user(&SPI_write,buf,count)) //Copy data from user space to kernel space

return-EFAULT;

for(num=0;num

for(i=0;i<8;i++){

iopdata=((SPI_write[num]&0x1)<<11)+(iopdata&0xfffff7ff);

SPI_write[num]=SPI_write[num]>>1;

iopdata=iopdata^0x1000; //clock output

}

}

return count;

}

//Interrupt response function [page]

static int SPI_irq(int irq,void *dev_id,struct pt_regs *regs)

{

intpnd=intpnd|0X1; //clear interrupt bit

wake_up_interruptible(&SPI_wait); //Wake up the sleep queue

return 1;

}

//Character device driver interface

static struct file_operations SPI_fops={

owner; THIS_MODULE,

read: SPI_onlyread,

write: SPI_onlywrite,

};

// Initialization function

int_init SPI_init(void)

register_chrdev(29,"SPI"&SPI_fops);//Device registration function

init_waitqueue_head(&SPI_wait);

if(!request_irq(0,SPI_irq,SA_SAMPLE_RANDOM,"SPI"NULL)){ //中断申请

return-EFAULT;

}

iopmod=(iopmod&0xffffe7ff)=0x1800+iopmod; //Set the general I/O port mode

iopcon=(iopcon&0xffffffe0)+0xle+iopcon; //Set general I/O mode

enable_irq(0); //enable interrupt

return 0;

}

module_init(SPI_init);

MODULE_LICENSE("GPL);

EXPORT_NO_SYMBOLS;

Conclusion

Experiments have shown that the simulated SPI port can accurately and reliably receive and send data. User programs can access it in the form of device files, which is no different from the standard SPI interface. This solution has certain reference value for the research of embedded home gateways and embedded simulated communication interfaces using uClinux as the operating system.