Single-chip microcomputers are widely used in many fields such as industrial control, data acquisition systems, intelligent instruments, and office automation due to their high reliability and high cost performance. In measurement and control systems, there are sometimes very strict requirements on the reliability of single-chip microcomputer systems. In addition to adopting a variety of measures in system design and production to improve its reliability, dual-machine hot backup is a very effective and frequently used method. In a dual-machine hot backup system, the two single-chip microcomputers must maintain a completely consistent working state and need to exchange data at any time. Usually, multi-chip microcomputer information sharing technology can be used to achieve data exchange between two single-chip microcomputers, such as mailbox storage systems, shared memory, etc., but these methods are complex to implement and have high hardware costs1. Most single-chip microcomputers provide universal serial transceivers (UARTs). When the single-chip microcomputer system does not communicate with other devices (such as host computers), it is very convenient to use UARTs, but unfortunately, UARTs have been used in most cases. Of course, serial and parallel communication interfaces can also be expanded, but the hardware cost will increase. Therefore, under the condition of meeting system performance, it is worth studying to make full use of the resources of the single-chip microcomputer itself and simplify the interface design of internal communication to the greatest extent. Among the many members of the single-chip microcomputer family, the MCS-51 single-chip microcomputer is widely used in the field of industrial measurement and control due to its superior performance, mature technology, high reliability and high cost performance. This article takes the MCS-51 single-chip microcomputer as an example and gives two simplified interface designs for dual-machine communication.
1 Internal communication through the P0 port of the microcontroller
This communication interface can achieve a higher transmission rate when using only one 74LS245. Figure 1 shows a simple schematic diagram of this interface. The bus transceiver 74LS245 is connected between the P0 ports of the two microcontrollers as a channel for internal data transmission. The P0 port is both a time-sharing address/data bus and can be used as an I/O port. Since the P0 port is an open-circuit output, a pull-up resistor should be added when used as an I/O port. For simplicity, it is not drawn in Figure 1. The enable terminal and direction control terminal DIR of the bus transceiver are both controlled by the logic control unit. The input of the logic control unit is the three port lines of the P1 port and the two signals U1ERR and U2ERR that indicate the operation status of the microcontroller. For convenience, the logic equation of the logic control unit is written out first.
U2P12=U1P11U1ERR
U1P12=U2P11U2ERR
E=(U1P13+U2P13)U1ERR U2ERR
DIR=U1P13 U2P13
U1ERR and U2ERR indicate the operating status of the microcontroller, usually reflecting the presence or absence of the ALE signal. It is agreed here that when U1ERR and U2ERR are 0, it means that the microcontroller is operating normally (that is, there is an ALE signal). U1P12, U1P11, U2P12, and U2P11 are used for communication between microcontrollers, and it is agreed that high level is valid. If any microcontroller fails, the signal of its P1.1 cannot be transmitted to the P1.2 end of the other microcontroller. DIR is controlled by P1.3 of the two microcontrollers, and determines whether the data is sent from microcontroller 1 to microcontroller 2 or from microcontroller 2 to microcontroller 1. It is also controlled by P1.3 of the two microcontrollers, but is also controlled by U1ERR and U2ERR. If any microcontroller fails, 174LS245 will be shut down.
1.1 Working Principle
Taking MCU 1 requesting to transmit data to MCU 2 as an example, the working process is as follows:
1. MCU 1 sets its P1.1 to 1, indicating a request to send data, and
sets its P1.3 to 1. 2. MCU 2 detects a high level at its P1.2 port, sets its P1.1 to a high level, indicating a response to the data sending request, and also sets its P1.3 to 1. At this time, 74LS245 is 0 and DIR is 1, and data can be sent from the P0 port of MCU 1 to the P0 port of MCU 2.
3. MCU 1 sends the data to be transmitted to the P0 port and sets its P1.1 to 0, indicating that one byte of data has been sent. 4.
After MCU 2 detects the low level of its P1.2, it reads the data from the P0 port and sets its P1.1 to 0, indicating that the data has been received.
5. After MCU 1 detects the low level of its P1.2, it can start the transmission of the next byte or end the transmission.
The process of sending data from MCU 2 to MCU 1 is similar to the above, except that MCU 1 sets its P1.3 to a low level after receiving the data transmission request, so that the DIR of 74LS245 is a low level, and the data transmission direction is opposite to the above. Compared with the circuit shown in Figure 3, this design method has a higher transmission rate.
1.2 Interface Circuit Description
The circuit shown in 1 is simplified for the convenience of description and can be redesigned according to actual conditions in application. Therefore, the above circuit and equation are not unique.
However, the principles that such circuits must follow are:
(1) Use bus transceivers for parallel bidirectional data transmission;
(2) The enable and direction control terminals of the bus transceiver are controlled by the logic control circuit, and the bus transceiver can be turned off when no data transmission is performed or when the microcontroller fails;
(3) The two microcontrollers should have a communication signal to determine when to perform internal data communication.
According to the above principles, the actual circuits are diverse. In addition to the port lines of port P1, the unused port lines of port P3 and the unused high-order address lines of port P2 can also be used as control signals. For example, a port line of port P3 can be used to output a communication signal, and the input of the communication signal is connected to the external interrupt input terminal of the microcontroller. In this way, the microcontroller responds to internal data transmission requests in the form of interrupts, which can further increase the transmission speed.
The logic control unit can be composed of gate circuits, but in many cases, programmable logic devices such as GAL are used to reduce the cost of the entire system and improve reliability. [page]
Figure 2 is an application example of the interface circuit designed by the author in the data acquisition system. For simplicity, the pull-up resistor required for the P0 port is not drawn. In this system, the P1 and P3 ports are all occupied, and the 2K bytes of external static RAM are expanded. The system needs to collect 16 digital input quantities. Therefore, the logic control uses the high-order address lines A13A12A11 of the P2 port. When A12A11 is 00-10, the memory and input channels are selected. The logic control unit uses a GAL16V8. The GAL16V8 also serves as an address decoder to select the static RAM and input channels (only the output related to internal communication is drawn in the figure). The six equations related to internal communication in the logic equation of GAL16V8 are as follows (in FAST-MAP format) 2:
U1P27=U2P26
U1P27.OE=/U2ERR
U2P27=U1P26
U2P27.OE=/U1ERR
245E=U1A12 U1A11 U2A12 U2A11
245DIR=U1A13 U2A13
From the above logic equations, it can be seen that the bus transceiver can only be turned on for data transmission after the two microcontrollers successfully communicate. When a microcontroller fails, its communication signal is set to a high impedance state by GAL, and the other microcontroller cannot communicate with it, and the bus transceiver is in a closed state, which will not affect the normal operation of the microcontroller.
2 Internal communication through the UART of the microcontroller
When the UART of the microcontroller is used to communicate with other devices (such as the host computer), it can be used for internal communication in a time-sharing manner. This design method has the simplest hardware circuit. In order to increase the communication distance and prevent interference, the communication between the microcontroller system and other devices mostly uses RS-485 communication. The following uses this as an example to introduce the design of the internal communication interface. Figure 3 directly shows a circuit example of this interface.
2.1 Working Principle
The communication between the two MCUs and other devices is carried out through the RS-485 transceiver SN75174. The meanings of U1ERR and U2ERR in Figure 3 are the same as those in Figure 2. IT1 and IT2 are internal communication signals, te1 and RE1 are the sending and receiving signals of MCU 1 to control the external RS-485 communication, and TE2 and RE2 are similar, both using the I/O port line of P3 port. Its internal communication interface is implemented by a GAL16V8. GAL16V8 completes the following functions:
① Provide a three-state internal communication interface for the two single-chip microcomputers. When one of the single-chip microcomputers fails, the internal communication interface is blocked;
② Provide a contact signal for the two single-chip microcomputers. When one of them requires communication, the other single-chip microcomputer is notified in time;
③ Control the external communication interface of the two single-chip microcomputers, and isolate the single-chip microcomputer from the RS-485 bus during internal communication.
For the convenience of description, the relevant part of the logic equation of GAL is given in the format of FAST-MAP:
RXD1=TXD2
RXD1.OE=IT1 IT2
RXD2=TXD1
RXD2.OE=IT1 IT2
IT1=/TE2 RE2 /U2ERR
IT2=TE1 RE1 /U1ERR
TE10=TE1 /U1ERR
TE20=TE2 /U2ERR
Assuming that single-chip microcomputer 1 initiates internal communication with single-chip microcomputer 2, the working process is as follows:
① Single-chip microcomputer 1 prohibits external data transmission and reception. That is, TE1 is low and RE1 is high, so that IT2 is high, and an internal communication request is made to MCU 2;
② After detecting the internal communication request of MCU 1, MCU 2 prohibits external data transmission and reception, making TE2 low and RE2 high, so that IT1 is high, responding to the internal communication request of MCU 1. At this time, the serial data transmission and reception of the two MCUs are interconnected through GAL, and the internal communication interface is opened;
③ After detecting that IT1 is high, MCU 1 sends data through the serial port;
④ After the communication is completed, the two MCUs open external data reception or data transmission, so that the internal communication interface is in a high-impedance state.
It can be seen from the above equations and communication process that internal communication and external communication are carried out in time-sharing, isolated from each other, and do not interfere with each other. When a MCU fails, due to the use of U1ERR and U2ERR signals, the corresponding internal communication contact signal is always invalid, and the external data transmission signal is also invalid, so that the internal communication interface is always in a high-impedance state, and no data will be sent to the RS-485 bus. Therefore, it will not affect the external communication of another microcontroller and the RS-485 bus connected to the faulty microcontroller.
2.2 Interface circuit description
The application of programmable logic devices in single-chip microcomputer systems is the development direction of system design. This article takes GAL as an example to introduce the design of the interface, but other devices can also be used as long as they can complete the above-mentioned logical functions. Moreover, the communication between the single-chip microcomputer and other devices is not necessarily RS-485 communication, but the circuit design is similar. The problems that need to be solved in this type of interface circuit are:
① Internal communication should be carried out in the gap between the communication between the single-chip microcomputer and other devices to avoid data loss;
② The signals of internal communication and external communication should be well isolated to prevent mutual interference;
③ When a single-chip microcomputer fails, it should be automatically isolated from another single-chip microcomputer to prevent the external communication of another single-chip microcomputer from being affected by the internal communication interface.
The first problem mentioned above can be solved by software according to the communication protocol, and the last two problems can be solved by hardware circuits.
This paper presents two simplified designs of internal communication interfaces and circuit examples. The GAL in the design is not designed specifically for the interface circuit and can be used in combination with other logic functions. The two communication interfaces have been applied in multiple single-chip microcomputer systems designed by the author. Practical applications have proved that the goals of simplifying the design, reducing costs, and reducing system complexity have been achieved, and they have certain practical value.
References
1 He Limin. Microcontroller Application Collection. Beijing: Beijing University of Aeronautics and Astronautics Press, 1993
2 Zhang Youzhi. Principles and Applications of Programmable Logic Devices (PLD). Beijing: China Railway Publishing House, 1996
3 Gao Chuanshan. Interface and Communication. Shanghai: Fudan University Press, 1989
4 Li Hua. Interface Technology for MCS-51 Series Microcontrollers. Beijing: Beijing University of Aeronautics and Astronautics Press, 1999
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