ADuC812 8-channel 12-bit AD converter and its application

1. Introduction
There are many types of A/D converters, and different applications have different requirements for them. Some require high conversion rates, some require high precision, and some are used in portable instruments and require low power consumption, etc. A/D converters used in data acquisition boards are generally used in combination with computers or microprocessors. With the widespread application of single-chip microcomputers in various intelligent instruments, some data acquisition chips that integrate A/D converters and single-chip microcomputer cores on a single chip have emerged. ADuC812 is such a chip.
ADuC812 is an 8-channel 12-bit successive approximation A/D converter. It has the following features (see Analog Devices' information: MicroConverter, Multichannel 12-Bit ADC withEmbedded Flash MCU ADuC812, 2002):
Contains 8-channel high-precision 12-bit A/D converter; sampling conversion rate up to 200kHz; high-speed data storage from ADC to external data memory can be achieved through DMA controller; the chip also contains 2 12-bit D/A converters; the chip contains a temperature sensor; the chip integrates an 8051-compatible MCU core, the operating frequency is 12MHz, up to 16MHz, the MCU has 3 16-bit timers/counters, 9 interrupt sources, and two levels of interrupt priority; the chip has 8K bytes of FLASH program memory, 640 bytes of FLASH data memory, and 256 bytes of on-chip RAM data memory, and can also expand 16M bytes of external data memory and 64K bytes of program memory; low voltage 3V or 5V power supply, with power saving mode; with UART and SPI serial interface; with watchdog timer.
2. Pin Description
ADuC812 uses S-52 package. Most of its pins have the same functions as the corresponding pins of 8051. The functions of several main pins are as follows:
P1 port: Different from the P1 port of 8051, it can only be used as an input port for analog or digital signals, but not as an output port. The default state is 8-way analog signal input terminal. To make any of them become a digital signal input pin, write a "0" signal to the corresponding bit of the special function register corresponding to the P1 port. If the corresponding bit of the special function register is "1", the pin corresponding to the bit is the analog signal input pin;
DAC0, DAC1: analog signal output pins of two-way D/A converters;
SS, SCLK, MOSI, MISO: serial device interface (SPI).
SS is the slave device selection of the SPI interface, used in multi-machine communication, SCLK is the SPI interface clock, MOSI and MISO are input/output data lines;
D0, D1: digital output pins multiplexed with the SPI interface, digital signals are output from D0 or D1 pins through the DCON special function register;
T2: digital signal input pin of timer 2;
T2EX: digital input pin, reads the counter of timer 2 or reloads the trigger pin of the counter, valid when negative jump.
The functions of other pins are the same as those of the corresponding pins of 8051.
3. Usage method
3.1 Program memory
The program memory is divided into on-chip program memory and off-chip program memory. The on-chip contains 8K bytes of FLASH programmable program memory, which can meet the design requirements of most data acquisition systems. This section of program memory can be written in two ways. One is to write serial download through the standard UART serial interface. When the PSEN pin is grounded through an external resistor, it automatically enters the serial download mode after power-on, and automatically downloads the program from the external development system through the serial port; the second method is the same as the programming method of E2PROM, and parallel writing is performed through the programmer.
3.2 Data Memory
The user data memory of ADuC812 consists of three parts: 640 bytes of FLASH data memory on-chip, 256 bytes of RAM, and 16M bytes of data memory off-chip. The 640 bytes of data memory are divided into 160 pages, 4 bytes per page, and are accessed through 6 special function registers, namely, ECON, EADRL, and EDATA1~4. The EADRL register specifies the page address to be accessed, and the ECON control register can control the data exchange between the EDATA1~4 registers and the 4 memories in the page specified by EADRL. ECON can also control the erase and verification operations of the FLASH data memory. Its control mode is shown in Table 1.

The addressing range of the external data memory is 000000H~0FFFFFFH, with a total address space of 16M bytes. The connection of the lower 16-bit address line is the same as the address connection method of the external data memory in the 8051 microcontroller system. The connection method of the upper 8 bits is to multiplex the P2 port, and use the ALE address latch signal to latch the lower 8-bit address signal of the P0 port while latching the higher 8-bit address signal to achieve the addressing of the 16M-byte address space. Its data pointer is different from that of the 8051 microcontroller, and is composed of three 8-bit registers, namely DPP (page byte), DPH (high byte), and DPL (low byte).
3.3 A/D Converter
ADuC812 contains an 8-channel single-power 12-bit successive approximation A/D converter. The linear error of the A/D converter is ±1/2 LSB, the conversion time is 5μs, and it can provide an internal 2.5V reference power supply. At the same time, it can also connect an external reference power supply from 2.5V to AVDD. The A/D conversion is controlled by the three special function registers ADCCON1~3. The conversion result can be saved in the two special function registers ADCDATAH/L. The lower 8 bits of the conversion data are saved in the ADCDATAL register, and the upper 4 bits are saved in the lower 4 bits of ADCDATAH. The upper 4 bits of ADCDATAH are used to save the sampling channel number. If the sampled data is large, such as continuously sampling the input analog signal at a rate of 200kHz, the DMA mode must be used at this time to directly save the sampled data in the external data memory, and then process the data after the sampling is completed.
The functions of the three control registers are as follows.
(1) ADCCON1 controls the acquisition and conversion time and conversion mode. The functions of each bit are as follows:
CK1 and CK0 select the main clock division coefficient, and the ADC clock is generated from the main clock division. When CK1-0 is 00-11, the division is 1, 2, 4, and 8 respectively.
AQ1 and AQ0 select the ADC sampling and holding clock. The division coefficient is generated from the ADC clock division. When AQ1-0 is 00-11, the division is 1, 2, 4, and 8 respectively.
T2C: Timer 2 overflow trigger bit. By setting this bit, the overflow signal of Timer 2 can be used as the ADC conversion trigger signal.
EXC: ADC conversion external trigger enable bit. By setting this bit, the ADC conversion can be triggered by the external pin (CONVST).
(2) ADCCON2 controls channel selection and conversion mode:

Among them, ADCI is the interrupt flag bit; DMA is the DMA mode enable bit; CCONV is the continuous conversion mode enable bit; SCONV is the single conversion mode enable bit; CS3, CS2, CS1, CS0 are channel selection bits, and the user specifies the channel to be A/D converted through the program. When CS3-0 is 0000~0111, it indicates 8 channel numbers, 1000 indicates the temperature sensor, 1111 is the DMA termination signal, and other situations are reserved.
(3) ADCCON3 is used to give the ADC status indication bit. Only the 7th bit is the BUSY bit, and the other bits are reserved. The BUSY bit is a read-only bit. In a valid ADC conversion or verification cycle, this bit is "1". When the conversion or verification is completed, this bit is cleared to "0".
3.4 D/A Converter
ADuC812 contains two 12-bit D/A converters. Each D/A converter can be used to convert 12-bit or 8-bit data. The two D/A converters share a control register DACCON. Each converter also has two data registers. The 12-bit data for A/D conversion is right-adjusted in the register. The lower 8 bits are in the DACxL register, and the upper 4 bits are in the lower 4 bits of DACxH. The functions of each bit of the control register DACCON
are as follows:
Among them, MODE is used to control the DAC conversion mode, "1" is 8-bit mode, "0" is 12-bit mode; RNG1 and RNG0 are used for output range control, "1" is 0~VDD, "0" is 0~VREF; CLR1 and CLR0 are output clear bits, "0" forces the output to 0V, "1" makes the output normal; SYNC is the output synchronization control bit of the two channels. When it is "1", the DACxL register is rewritten, and the output changes. To make the two channels change synchronously, the DACxL/H registers of the two channels must be updated when SYNC is "0", and then the SYNC position is set to "1", and the two channels update the output value synchronously; PD1 and PD0 are power saving mode bits, "0" turns off the D/A conversion of the corresponding channel, and "1" turns on the D/A conversion. The reference voltage
of the D/A converter can be selected by the DACCON control register through software to select VREF or VDD, so that the output voltage range is 0~VREF or 0~VDD, respectively, and the response time of the D/A conversion is less than 15μs. [page]
4 Applications
Based on the many features of ADuC812, if necessary external signal conditioning circuits are added, a complete and practical data acquisition and control system can be constructed, and the hardware structure of the system is very simple.
Figure 1 is a dynamic balancing machine measurement system composed of ADuC812.

During the rotation of the rotor, the centrifugal force generated by the imbalance causes the swing frame system to vibrate. The dynamic balancing machine converts this mechanical vibration into an electrical signal through the sensor, and then goes through the plane separation, attenuation and calibration adjustment, filtering and amplification processing circuits, and finally
displayed by the indicating instrument. When the dynamic balancing machine balances the rotor, if there is an unbalanced amount on any plane of the rotor, it will inevitably cause vibration on both the left and right supports. The magnitude of the vibration can be measured by the left and right sensors. Let m1r1 and m2r2 be the unbalanced amounts on the left and right correction surfaces. The vibrations caused by the unit unbalanced amount on the left correction surface are αL1 and αR1 respectively, and the vibrations caused by the unit unbalanced amount on the right correction surface are αL2 and αR2 respectively. The total vibrations of the left and right ends are VL and VR, as shown in Figure 2. Then

, Δ＝αL1αR2－αR1αL2 is the coefficient determinant of the equation group. If the vibration amount on the right end is taken out through the voltage divider circuit and subtracted from the vibration amount on the left end, the unbalanced amount m1r1 on the left end is only related to the vibration VL on the left end, which is just a scalar related to the magnitude of the unbalanced amount on the left end. They can be compensated by calibration setting. This eliminates the influence of the unbalanced amount on the left end at the right end, and similarly eliminates the influence of the unbalanced amount on the right end at the left end. Through the signal conditioning circuit, the attenuation control, plane separation, signal amplification and level bias of the signal can be completed, so that the output signal contains both the AC vibration signal and the DC bias level. Because the A/D conversion circuit is a single power supply device, it can only convert positive voltages from 0 to VREF, but not negative voltages. After the vibration signal passes through the signal conditioning circuit, after phase-sensitive detection, the output is a positive DC voltage, which meets the requirements of A/D conversion.
After R00 and R900 phase-sensitive detection, the vibration signal VR at the right end can be decomposed in the directions of 00 and 900, assuming them to be VR0 and VR90 respectively. After L00 and L900 phase-sensitive detection, the vibration signal VL at the left end can be decomposed in the directions of 00 and 900, assuming them to be VL0 and VL90 respectively. The amplitudes of the vibrations at the left and right ends are respectively:

Therefore, after phase-sensitive detection, two components with a phase difference of 90° at the left and right ends are obtained. After A/D conversion, the MCU calculates the amplitude and phase angle of the left and right ends respectively. The vibration amplitudes |VL| and |VR| reflect the magnitude of the vibrations at the left and right ends. By calculating |VL| and |VR|, the magnitude of the imbalance at the left and right ends can be solved, and the vibration phases ΦL and ΦR reflect the position of the imbalance. The calculation of the phase angle can find out the phase of the imbalance, indicating the phase position of the heavy or light point.
The rotor speed is achieved by controlling the timing of timer/counter 0 by external interrupt pin 0. It can be seen from the structure of 8051 timer/counter in working mode 0 and mode 1 that when the TR0 bit of TCON is 1, the GATE bit of TMOD is 1, and T0 works in timing mode, the internal oscillation signal is divided by 12 to provide a clock signal to T0. Whether T0 counts or not is related to the level of external interrupt 0. If INT0=0, T0 does not count. If INT0=1, T0 starts counting. In this way, the pulse width can be measured. The rotor speed is converted into a pulse signal through the photoelectric head and then divided by 2 to obtain a square wave signal with a frequency of half the rotor rotation frequency. The high level of the square wave signal is used to control the count of T0. This value is the rotation period of the rotor. The rotor speed can be obtained from the rotation period of the rotor.

The calculation of rotor speed and unbalance is completed through external interrupt 0. The pulse signal generated by the photoelectric head is divided by 2 to obtain a square wave signal with a frequency of half the rotor rotation frequency. This signal is added to INT0, and the external interrupt 0 is set to edge trigger. An interrupt is generated at the falling edge of each square wave. The MCU reads the TL0 and TH0 register values, and clears TL0 and TH0 to start the next timing. Then, according to the values ​​of TL0 and TH0, the rotor speed is calculated, and the TL1 and TH1 of the timer/counter 1 are configured according to one-fourth of the rotor rotation period value in TL0 and TH0. The timer/counter 1 works in timing mode. Through the interrupt of timer/counter 1, two DACs generate two square wave signals with a phase difference of 90°, which are used for phase-sensitive detection of vibration signals. The MCU performs A/D conversion on ADC0~ADC3, calculates the size and phase of the unbalance of the left and right planes, and then sends the speed and the size and phase of the unbalance to 8279 for display. The flow chart of unbalance measurement is shown in Figure 3. The system is used to transform a turbine rotor dynamic balancing machine and has achieved the expected effect.

→参考文献CH(开始) 1 Ye Neng'an, Yu Rusheng (eds.), Dynamic Balancing Principle and Dynamic Balancing Machine, Wuhan: Huazhong University of Science and Technology Press, 1985
2 Fang Xiaocui, Wang Jinfeng (eds.), Practical System Design Technology of Single-Chip Microcomputer, Beijing: National Defense Industry Press, 1999