Embedded Ethernet Connection Based on MC9S12NE64 Microcontroller

1 Introduction
With the emergence of the Internet and the rapid development of Ethernet, the number of Ethernet-based device controls is increasing and the development is getting faster and faster. At present, Ethernet (EtImmet) has been widely used in various computer networks. Through Ethernet and TCP/IP protocol stack, different network devices can be interconnected and exchange data.

There are many solutions to realize network connection of embedded systems using Ethernet. The traditional multi-device Ethernet connection solution is to expand the Ethernet controller through MCU, and if necessary, it is also necessary to expand the external RAM and ROM. Although this solution is not very difficult to apply, the number of external components used is large and the system overhead is large. The stability is not high. In order to solve the shortcomings of the traditional solution, this paper discusses the use of 16-bit microcontroller MC9S12NE64 with integrated Ethernet MAC layer and physical layer to realize single-device Ethernet connection. Compared with the multi-device solution, the single-device connection solution has a series of advantages such as fewer external components, low system overhead, high stability, and short design time.

2 Introduction to MC9S12NE64
MC9S12NE64 is a 16-bit single-chip microcomputer based on the HCSl2 CPU core produced by Freescale. It can be used to easily realize single-device Ethernet connection and form a complete terminal node. The internal functional module block diagram of MC9S12NE64 is shown in Figure 1. The main features are as follows:

It uses a high-performance 16-bit HCSl2 CPU core, and the operating frequency can reach 25MHz or 10MIPS at 3.3V. It has an optimized C language architecture and can generate very concise code.

It has an on-chip debugging interface, which can perform real-time online simulation and debugging without an emulator.

It integrates 64KB of nash memory and 8KB of static RAM, which can meet most applications. It can also be expanded externally if necessary.

It integrates a 10/100Mbps Ethernet media access controller (EMAC) and a built-in standard media independent interface (MII). It can implement address recognition and filtering, Ethernet type filtering, support half-duplex and full-duplex communication, and has a configurable EMAC buffer shared with 8KB RAM, including one send buffer and two receive buffers. The RAM of MC9S12NE64 runs at twice the speed of the CPU, so that the CPU and EMAC buffer can cross-access data.

It integrates a 10/100Mbps Ethernet physical layer (EPHY), supports automatic negotiation mode, and supports half-duplex and full-duplex communication. It also has a self-diagnosis function. It has an

8-channel 10-bit analog-to-digital converter (fADC), a 4-channel 16-bit timer, 2 serial communication interfaces (SCI), a high-speed serial peripheral interface (SPI), and an I2C interface with 256 clock speed options. It has a clock and reset generator (CRG) module using a phase-locked loop and up to 70 general-purpose I/O ports. It is available in 80-pin TQFP-EP and 112-pin LQFP packages.

3 Simple Application of MC9S12NE64
3.1 Hardware Design
MC9S12NE64 can be used to form network terminal nodes with different functions, such as network servers, devices with Internet functions, remote monitoring (data acquisition, diagnosis), remote control of field equipment, and remote devices sending messages via email or text pager.

The hardware circuit schematic diagram of the system based on MC9S12NE64 with minimal peripheral devices is shown in Figure 2. This minimum system consists of an 80-pin MC9S12NE64 and peripheral devices. The circuit has a background debugging connector J1; 5 LED status indicators (used to display the network connection status, including whether EPHY conflicts, whether the connection is established, whether data is received, connection speed, and duplex mode); required bias resistor R5; high-speed LAN electromagnetic isolation module (i.e. RJ45 Ethernet interface). Among them, PHY_TXP and PHY_TXN are transmission lines, and PHY_RXP and PGY_RXN are reception lines. During design, the physical port of MC9S12NE64 must be connected to the isolation transformer in accordance with the requirements of IEEE802.3 for the physical layer specification. For example, the spacing between the RJ45 jack and the isolation transformer should be as small as possible, the routing of the output and input differential signal pairs should be well isolated, and the rated load current of the power supply should be no less than 300mA. During design, attention should also be paid to the requirements of the system clock. MC9S12NE64 only supports Pierce-type oscillator circuits, and the accuracy of the crystal oscillator should be higher than 25ppm. In the system, MC9S12NE64 works in normal single-chip mode, and its internal voltage regulator is in working condition.

3.2 Initialization of MC9S12NE64
Before the MC9S12NE64 microcontroller works, it must be initialized as necessary. This mainly includes the clock and reset generator (CRG) module, EMAC module, EPHY module, etc. Although the EMAC and EPHY on the MC9S12NE64 are designed as two independent modules, if the internal EPHY is used, the EMAC and EPHY must be initialized at the same time.

The initialization process of MC9S12NE64 is as follows:
(1) Initialize the clock and reset generator module to generate a 25MHz internal bus clock. This process is completed by setting the register table of the clock and reset generator (CRG) module.
(2) Set the DIS10 and DIS100 bits of the EPHYCTL0 register to 1 to invalidate the EPHY clock until the EMAC and EPHY are configured.
(3) Configure the EPHY address requested by the MII through the EPHYCTL1 register: EPHEADD0, E-PHYADD1, EPHEADD2, EPHEADD3, and EPHEADD4.
(4) Configure the auto-negotiation mode. Set the ANDIS bit of the EPHYCTL0 register to 0. Use the auto-negotiation mode.
(5) Set the LEDEN bit of the EPHYCTL0 register to 1 to allow the EPHY to drive the LED signal. Set the EPHYIEN bit of the EPHYCTL0 register to 1 to enable the EPHY interrupt. Set the
EPHYEN bit of the EPHYCTL0 register to 1 to enable the EPHY to work effectively, so that the media independent interface (MII) operation between the EMAC and EPHY can be implemented.
(6) Set the MDCSEL bit of the MCMST register to 0xA to configure the EMAC management data clock (EMACMDC).
(7) Set the BUFMAP bit of the BUFCFG register to configure the size of the EMAC Ethernet buffer. The value of BUFMAP is used to determine the ratio of user RAM and EMAC buffer in the system RAM. The maximum value of BUFMAP is 4. At this time, the size of a single buffer is 1.5K bytes, which can just store a maximum Ethernet frame. Data packets larger than the buffer size will be filtered out, and a reasonable choice should be made during design. Set the MAXFL bit of the BUFCFG register to specify the maximum frame length accepted, so that the buffer plays a role in data filtering.
(8) Configure the 6-byte MAC address through the MACAD register. If the device is not connected to the Internet, the MAC address can be defined by itself.
(9) Set the ETCTL register to 0x17 to control the type of data transmitted on the network.
(10) Configure the MAC address filtering mode of the EMAC by setting the PROM, CON-MC and BCREJ bits of the RXCTL register. If it is not in auto-negotiation mode, the RFCE bit also needs to be set to implement receive flow control.
(11) Set the NETCTL register to 0x81 to configure the working mode of the EMAC and enable the EMAC to work normally.
(12) Set the IMASK register to configure the enabled EMAC interrupt signal. If you need to allow a certain interrupt request signal, set the corresponding position to 1.
(13) Set the PTRC bit of the TXCTS register and set the PTI-ME register to initialize and pass the pause duration.
(14) Set the system interrupt to enable system interrupts.
(15) Set up EPHY through the EMAC MII management interface, including setting speed, duplex mode and flow control, and set the EPHY interrupt control register to configure the EPHY interrupt control.
(16) In auto-negotiation mode, start the EPHY clock generator by setting the DIS10 and DIS100 bits of the EPHYCTL0 register to 0. When auto-negotiation is completed and the connection is established, the negotiation tentative and duplex settings are determined by the EPHY MII register. The EMAC must update the negotiation tentative and duplex settings according to the configuration set by the FRCE bit of the RXCTS register and the FDX bit of the NETCTL.

So far. The MC9S12NE64 is initialized and data reception and transmission between the EMAC and EPHY can be completed. To realize communication between the system and other devices on the Ethernet (such as PCs), you only need to implement the TCP/IP protocol stack. Due to the lack of internal resources of the microcontroller, it is difficult to support a complete TCP/IP protocol stack. Therefore, a specific TCP/IP protocol stack is set according to the characteristics and functions of each system, and only the protocols related to the needs are implemented, such as ARP protocol, IP protocol, ICMP protocol, TCP protocol, UDP protocol, SMTP protocol, HTYP protocol, etc.

After the system is initialized, it enters the main program loop, including the control function of the microcontroller and network data transmission. For the Ethernet transmission part, there are two main functions: one is to encapsulate and send the data to be sent according to the Ethernet data frame format; the other is to unpack the received Ethernet data frame for use by the application. The main program realizes the Ethernet communication of the microcontroller by embedding the TCP/IP protocol.

4 Conclusion
The author has implemented embedded Ethernet communication based on TCP/IP protocol using MC9S12NE64 16-bit single-chip microcomputer. With the rapid development of digital and intelligent instruments, the application of Ethernet communication will become more and more extensive. MC9S12NE64 has built-in Ethernet MAC layer and physical layer, which can be used to easily realize single-circuit Ethernet connection. It is suitable for industrial control, security system, user card table, commercial automation, building control, lighting management, medical testing, vending machine environment monitor, sales equipment terminal and home automation, etc.