Research on automatic image alarm system and its implementation with single chip microcomputer

Alarm systems are widely used in places and fields such as banks, restaurants, traffic management, and intelligent buildings. Most traditional automatic alarm devices use single-point signal alarms, that is, sensors are placed at a specific location. When the physical quantity at the collection point reaches the alarm threshold, an alarm request signal is sent to the central control computer. The advantages of this alarm device are easy installation and quick response, but its application range is small, it is overly sensitive to single-point noise, resulting in false alarms, and it cannot prevent false alarms and missed alarms at the same time. These inherent defects limit its application in places with complex situations and require certain dynamic control capabilities.

The image-based automatic alarm system overcomes the above defects. By taking a panoramic shot of the monitored scene, the random noise sensitivity of measuring a single acquisition point is avoided; and the introduction of digital image processing technology enables the entire system to be adaptively adjusted within a wider range.

1. Composition of automatic image alarm system

A complete automatic image alarm system consists of three main parts: image acquisition camera, image signal processing and alarm signal generation, and central control computer [1]. This article only discusses the second part. The automatic image alarm system mentioned in the previous article actually refers to this subsystem.

In order to reduce the complexity of central control processing and the additional overhead of image signal transmission, the image signal processing and alarm signal generation are implemented in hardware and placed at the front end together with the camera, thus forming a distributed processing system. The hardware structure of the image alarm system is shown in Figure 1.
2 Key technologies in design and implementation

Ensuring real-time performance and dynamic adjustment capabilities is the primary goal of system implementation. To facilitate hardware processing, the algorithm uses grayscale threshold segmentation and difference image area accumulation. Based on the consideration of reducing system costs, it is impossible to use a DSP chip with strong digital signal processing capabilities, and general industrial control microcontrollers are difficult to meet the requirements of real-time computing, which is the key issue in the design.

This system adopts the idea of ​​lookup table, converting the image difference operation into the read operation of FLASH/EPROM. The principle is to store the processing results of the difference algorithm in the predetermined storage unit of FLASH or EPROM in advance, and the pixel grayscale data (8 bits) of the two frames of images for difference operation are used as the high 8-bit address and low 8-bit address of the memory respectively. The result of this processing is that the time required for each pixel difference operation is one read cycle of the memory, which can obviously meet the real-time requirements. The pixel grayscale value after difference processing is sent to the counter through the threshold judgment. When the accumulated number exceeds a certain area, the MCU will issue an alarm signal.

The memory (FLASH/EPROM) algorithm is:

(Gvalue)＝｜Hvalue-Lvalue｜（1）

Among them, Hvalue is the A/D direct image sampling signal (8 bits), which is also the high 8-bit address of the memory; Lvalue is the digital image reference frame sampling signal (8 bits) stored in DRAM, that is, the low 8-bit address of the memory; Gvalue is the 16-bit address of the memory.

The threshold determination adopts the global threshold method [2], which is suitable for scenes with uniform lighting conditions. For the change of the overall grayscale of the scene, the adaptive effect can be obtained by controlling the MCU to regularly refresh the DRAM reference frame data and adjust the global threshold T and critical area S. The threshold determination and counting statistics are described as follows:

if(Gvalue)>T, count=count+1(2)

If count>S, alarm is triggered (3)

The system working example is shown in Figure 2.

3. Device Selection and Operating Characteristics Description in MCU Implementation

The choice of devices in hardware implementation plays a decisive role in the performance of the entire system. ATMEL is a world-renowned first-class semiconductor manufacturing company that provides high-performance, low-power, non-volatile memory and digital integrated circuits. After careful research, this system selected several ATMEL chips to complete the key functions of the system. [page]

3.1 RISC structure microcontroller AT90S2313

ATMEL's 90 series microcontrollers are MCUs with enhanced RISC and built-in FLASH, usually referred to as AVR MCUs. The traditional accumulator-based structure requires a large amount of program code to realize data transfer between the accumulator and the memory, and due to clock division, data transmission becomes a system bottleneck. The AVR MCU is the first true 8-bit RISC MCU. Its fast access to the RISC register file and single instruction cycle make its performance significantly superior to ordinary 8-bit MCUs [3].

AT90S2313 has 2K bytes of internal programming FLASH, 128 bytes of SRAM data storage unit, 128 bytes of EEPROM working register, 32 bytes of general working register, 15 I/O, one 8-bit and one 16-bit timer/counter, universal asynchronous transceiver, 20-pin PDIP or SoC package, supports in-system programming, and the highest operating frequency is 12MHz[4]. In this system, it is responsible for completing the initialization of A/D devices, the control of address generator and data storage, as well as counting statistics and alarm triggering.

The A/D conversion uses Philips' SAA7111, which is initialized through the I2C bus. The two general I/O pins of the AT90S2313 can generate the timing signal of the I2C bus to complete the initialization of the SAA7111. The 16-bit counter on the chip is used for counting statistics and generating interrupt alarm signals. The threshold judgment and critical area setting as well as the regular refresh of the DRAM reference frame are all realized by programming the AT90S2313.

Due to the use of reduced instruction set structure, the programming of AT90S2313 is different from that of the usual 51 series. To achieve more complex control functions, you can also consider choosing other models of the AT90S series, such as 4414, 8515, etc.

3.2 AT29C512 High-density FLASH

Although FLASH technology is not new today, ATMEL's AT29 and AT49 series still dominate the market with their excellent performance and wide applicability. According to the need for differential data width, this system selects AT29C512 (64K×8) Boot FLASH, whose read cycle length is 70ns, which fully meets the requirements of real-time processing.

The advantage of choosing FLASH is that it can be rewritten in the system, which is very beneficial when the usage environment is complex and requires a lot of dynamic adjustment processing. The difference algorithm in FLASH can be modified through AT90S2313 to adapt to the needs of the actual environment.

For situations where environmental conditions do not change much, you can use ATMEEL's EPROM products, model AT27C512R or AT27C520.

3.3 ATF1500A High-density CPLD

The operation timing signals of DRAM, including row and column address generation, refresh control, read and write control, are all generated by the address signal generator. Here, the ATF1500A high-performance FLASHCPLD is selected. In addition to generating row and column address signals selected by sampling, it is also necessary to provide a read control signal to the AT29C512 and complete the synchronization of the entire system. The clock signal LLC2 generated by the master mode of the SAA7111 is the reference clock for the system. Since the image format output by the SAA7111 greatly exceeds the basic resolution required by the alarm system, a certain frequency division, i.e. sampling processing, is required.

The ATF1500A has 32 flip-flops, 32 I/Os and 1500 equivalent gates, a maximum inter-pin delay of 7.5ns, and a 44-pin PLCC or TQFP package [5]. Its various operating parameters fully meet the needs of the system address/control bus structure, and it has third-party development tool support and encryption features.

In addition to the ATF1500A, the 1500 series also includes a variety of models to meet the needs of applications of different complexity, including in-system programming functions. You can also consider using multiple ATF22V10s to achieve the same function, or use the ATF750 series, which uses ATMEL's unique PLD structure and has the strongest function in the 24-pin package type.

4 System Performance Evaluation

Compared with single-point signal alarm, the automatic image alarm system has the advantages of panoramic monitoring, dynamic adjustment and strong anti-interference ability. In the process of system design and implementation, the lookup table technology is used to reduce the complexity of the processor, and the system operation effect is optimized through the comparison and selection of devices.

During the system trial operation, when mosquitoes climbed onto the camera lens and lightning occurred, false alarms may occur. The solution involves the understanding of image content and the correlation between dynamic range adjustment and time density, which will be studied and discussed in depth.