Miscellaneous Discussion on Low Power Consumption Design of Single Chip Microcomputer

Nowadays, many microcontroller application areas are powered by batteries, and energy saving has become a common concern for design engineers.

Entering Power-Down Mode

There are many low-power chips now, especially after entering the power-down mode, the current is only 1uA. You can also use the power management method to turn off the system power when not working, which is more power-saving. I have used the 51 chip for a long time. I was very dissatisfied with its power consumption, but because its price is getting cheaper and cheaper, its cost performance is still very good, so I can't get rid of it.

1. Sleep. Generally, the system will not be too busy, so proper sleep can still save some power. In some simple systems, taking more time to sleep is the key to saving power. You can see that other chips do not consume power, only the microcontroller is the key. Sometimes, increasing the main frequency will get more sleep time, which will make the system power consumption smaller. However, it is worth noting that frequent switching between sleep and working states will cause the power supply to fluctuate at the mV level, especially for many linear regulators with an output capacity of less than 100mA. Such fluctuations may affect the AD and some other analog circuits in the system, which is worth noting.

2. Power-off. If the power-off mode is entered, many 51 chips cannot be restarted through interruption. You can add a micro-power microcontroller to provide reset. This microcontroller is only responsible for keyboard scanning and resetting the 51 microcontroller, as well as sending keyboard codes to the 51 chip. I have seen a handheld device before, which consumes very little power, but includes large-capacity storage, display, input, data output, retrieval and other functions. Usually, 89C51 is always in a power-off state, but after keyboard operation, it resets and starts running, and automatically powers off after processing the tasks sent by the keyboard.

3. Complex calculations. Complex calculations (such as exponential calculations, floating-point multiplication and division) will definitely take up more system timing. To reduce the sleep time, you can use a table lookup method. In this way, a large-capacity table replaces the on-site calculation. Wouldn't you be able to sleep more time?

4. If the software tasks are reduced to a certain extent, you can consider running the crystal at 32k. In fact, this saves more power, but it means that the 51 software basically has nothing to do at high speed and does not require serial communication. Otherwise, you should face reality honestly.

I think that the 51 chip is not very suitable for battery-powered systems, but from the development cycle, its development environment is very good. After all, it can carry relatively large applications of 8-bit machines, and sometimes it has to be used. I think the AVR microcontroller that is closest to the 51 is more suitable for future applications because its performance-price ratio is still good compared to other microcontrollers, unless the 51 chip can achieve a working current of less than 2mA, a sleep current of less than 500uA, and a power-off current of less than 10uA under 3MIP in the future. In many designs, the linear step-down method is used, and the power loss is large. If the power supply voltage is increased and a high-efficiency DC-DC power supply is used, the power supply time can be extended. When the 89C8252 is powered off, the watchdog acts as the "system running clock" and resets the watchdog at the same time. The "software simulates the watchdog interrupt" and the "dog" barks once and jumps up to see, "register in the RAM duty room", and also registers the current PC+1 value, and then "sleeps"!

The average power consumption is no more than 5V/0.3MA, and it has strong anti-interference ability!

Software optimization is important!

For example, if 64MS executes 40 instructions at a time, the maximum under 24MHZ is: 40*0.5=20US

So the duty cycle: 20/64000=1/3200, that is, the average current drops by 3200 times!!!

Will the peripherals be changed by reset? Of course! But what are latches for?!

How do I know how long the program can run? Where will the next instruction run to?

If you don't know which area your program is running in at any time, then how can you say that software and hardware should be in harmony with nature?!

When the system task is not busy, your watchdog timer reset method is OK, but... It seems that it cannot be done in many cases. My 51 system only has 200 microamperes. Saving power is a big problem, especially for 51, but it can be done with care, especially when there are few tasks. One of my hydrological telemetry systems, powered by a 12-volt battery, consumes only 200 microamperes. It has 8Mbit data flash, a modem, a clock, a 485 communication port, a 232 communication port, and 6 digital tubes. Isn't it enough? But they don't work normally. I also use watchdog reset to wake up the 51 microcontroller, once every 1.6 seconds, using x25045, but the reset time of 25045 is as much as 200 milliseconds. Experiments have found that it only takes 30 milliseconds for 51 to return to normal operation from power failure. Don't underestimate the more than 100 milliseconds saved, because 51 can power on immediately as long as it finds that there is no task every time it wakes up, so a CMOS single stable is added to reset. The other thing is to pay attention to the state of the port line, don't let it absorb current or output current. If you can't do it, you can try to add a circuit, such as an inverter.

The voltage regulator is a matter of balance. Although the switching voltage regulator has higher efficiency, it may not be right in low-power design. The current consumed by the switching power supply itself is a big problem. A micro-ampere system may need special treatment. I use the max667 linear voltage regulator with a static current of several micro-amperes. I think the switching power supply cannot be used for applications with frequent external affairs, and the power-down mode cannot be used. Although many 51 chips support external interrupts to trigger the chip to leave the POWER DOWN state (such as Winbond's W78E58 and W77E58), it still cannot solve the problem of serial communication. Moreover, for occasions that require internal precise timing, it takes a long time to go from POWER DOWN to normal operation. This is probably still difficult for people to accept. Is it possible that no manufacturer can produce high-speed and low-power 51 chips? That doesn't make sense. Didn't PHILIPS play for a long time? How come the chip it made is still greater than 10mA at 12MHz, and there are still a few mA in sleep mode? This is just bragging without any effort!

It is too tiring to use 51 for low power consumption. There are many low power consumption systems, such as PIC and EMC, which can easily reach below 20uA. 51 has POWER DOWN, but it can only be reset and woken up. A few can be woken up by INT, which is too troublesome. Some single-chip microcomputers with dual crystals are the easiest to use for low power consumption. Usually, 32768 is used for work, which is only 20uA. This type of single-chip microcomputer usually has an LCD. EMC has a PLL single-chip microcomputer, which is very convenient for power consumption systems, such as 78565 and 567. The single-chip microcomputers with strong functions and low prices of samgsung can achieve 565, which is also used by craftsmen. Usually in IDLE mode, the power consumption is only a few UA. Hierarchical power supply and external wake-up are indeed a feasible method. In hierarchical power supply, it should be noted that if the power supply is a low-current voltage regulator, it is better to have a relatively large power storage circuit, otherwise the microcontroller may not start when it wakes up and powers on, and may enter an undesirable oscillation period. For example, the microcontroller needs to start oscillation, the current increases, and the power supply cannot be supplied at this time, the voltage drops, causing the microcontroller to stop oscillation and the voltage to rise again! Therefore, a reasonable power management circuit is very critical. Professional ICs in this area will be a promising industry in the future! This IC should have an internal low-speed timer and a special power storage management circuit. When the circuit enters low power consumption, the power storage circuit should be fully charged for wake-up and high power consumption. This circuit is mainly used in low-current power supply environments. It can provide a short-term high-current operation for low-current power supply environments. In addition, in addition to the power consumption of the core itself, the power consumption of the microcontroller is mostly the power consumption of the IO port. You can achieve a more worry-free and labor-saving method by reducing the main frequency and placing the IO port in a more appropriate state. Moreover, unreasonable frequent wake-ups sometimes bring more power consumption!

Using TI's single-chip microcomputer MSP430 series is very power-saving. It consumes hundreds of microamperes in normal operation and about 1 microampere when powered off. 87LPC76X low-power 51, 20uA at 32k. Use a dual-oscillator single-chip microcomputer, use a 32768 crystal oscillator when the system is not busy, and enter SLEEP at the same time. This process usually consumes several uA. The program after the SLEEP wake-up needs to be handled carefully, especially the Taiwan single-chip microcomputer. Sometimes you have to be careful with the information provided by the manufacturer. I have encountered this. I don't know which 51 single-chip microcomputer you are using, and the power consumption can be so low. As far as I know, the ATMEL89C52 Powerdown mode is at least 40 microamperes. There are so many devices in your system. Even if they are all low-power and can be turned off, your system must start all the devices every time it works. How long does this startup process take? Also, your microcontroller will not work at 12V. You still need a voltage converter. Does it not use electricity normally? Does your CMOS monostable not use electricity? As far as I know, the commonly used 485, 232, modem, and flash are not low-power and can be turned off. If you use special devices, what is the practical significance? Or if you use other devices to control these power-consuming devices, then you must be a hardware expert. Can you give me some advice?

High Speed ​​51: C8051FXXX, under 1M instruction flow, VDD is only 1.5mA, use IO port to control RC oscillation frequency?

Use RC oscillation mode and connect a resistor from IOSI port to IO port. Switch the frequency by switching the level of IO port. The method is as follows:

Power consumption is an important consideration in battery-powered instruments. The PIC16C×× series microcontrollers have low power consumption (the operating current is less than 2mA at 5V, 4MHz oscillation frequency). To further reduce power consumption, the operating frequency can be reduced while ensuring that the working requirements are met. The reduction in operating frequency can greatly reduce power consumption (for example, when the PIC16C×× works at 3V, 32kHz, its current can be reduced to 15μA), but the lower operating frequency may cause some subroutines (such as mathematical calculations) to take up more time. In this case, when the oscillation mode of the microcontroller adopts the form of an RC circuit, the solution can be to increase the operating frequency midway. The specific method is to connect a resistor (R1) between an idle I/O pin (such as RB1) and the OSC1 pin, as shown in Figure 1. RB1=0 is set in the low-speed state. When fast calculation is required, RB1=1 is set first. Since the capacitor voltage rises quickly during charging, the operating frequency increases, the calculation time is reduced, and RB1=0 is set again after the calculation is completed, entering the low-speed, low-power state. The change in operating frequency depends on the resistance value of R1 (note that R1 cannot be selected too small to prevent the oscillation circuit from not oscillating, and is generally selected to be greater than 5kΩ).

Use C8051Fxxx instead, 20MHz is only 10mA, if it is reduced to 1MHz, it can be reduced to 1~2mA;

Or simply use MSP430, which is generally <1mA. With a little effort, it can be close to zero power consumption!

Don't think that replacing the CPU is difficult. We replaced it successfully in just 2 weeks. The CPU is inherently insufficient. 51 low power consumption has no future. There are many low power MCUs such as msp430 and m16. They are powerful and have streamlined instructions. The all-day uA-level working cost is also the key. It is not necessary to have low power devices. I think we should make good use of the interrupt and sleep functions of the MCU. The MCU should be in sleep waiting state as much as possible. At the same time, pay attention to the status of the idle IO port. The output is best set to low. The input depends on the peripheral circuit. The unused pins should be handled well. It is not a simple matter of not connecting them.

In addition, the peripheral circuit can be used as a power switch for different regions. When not in use, the power supply can be turned off, and the IO port of the microcontroller connected to it can be set low to reduce the power supply of the signal line. I don't know if what I said is correct.

When we first started making battery products, we only had 8031, and we considered using PSEN to control external RAM and sleep mode, but it was still at the ten milliampere level. Now, there are many models of microcontrollers that have low power consumption, and in order to reduce the size, we have to pursue lower power consumption.

1. System design. Good system design is the key to reducing power consumption. Reduce peripheral devices and lower crystal frequency. You can use a single-chip microcomputer with LCD, AD, and real-time clock functions, which can reduce costs and reduce the failure rate. It can be said that it kills two birds with one stone. HOLTEL, PHILIPS, and PIC all have such single-chip microcomputers. Low main frequency can also reduce power consumption. For example, ZILOG's single-chip microcomputer can program the frequency division of the main frequency, reduce the frequency when not busy, and increase it when needed. HOLTEK can use dual-frequency operation, and the high main frequency can be turned off. 32768 can provide internal precise timing and can also activate the dormant single-chip microcomputer to work.

2. Reducing system voltage can reduce power consumption.

3. Reasonably handle unused IO ports, preferably set them to input state. Also consider the peripheral circuits, such as optocouplers, try to make their on state < off state. Drive the state of the transistor. Also, the pull-up and pull-down resistance values, too small will also cause leakage.

One of the features of Mega8 is that it has an internal RC oscillator. Don't underestimate it. The difference between it and the crystal oscillator is that its start-up time is very short, only a few uS, while the crystal oscillator generally takes tens of mS, so it must be used in low-power design. Doesn't the promotion of 430 also mention the start-up time of 6uS? That also refers to the time when the RC oscillator starts working. I have to design a static current of 50uA, which is actually only the current of the LCD module. The microcontroller is usually in a power-off state. Every 1S, the LCD module wakes up once and refreshes the display, which takes about 4mS. If there is a pulse during normal operation, some calculations are performed. The pulse frequency is 50Hz, and each calculation is no more than 200uS. In this way, the power consumption of the positive electrode is greatly reduced. With some peripheral circuits, the average is below 100uA. [page]

Low power design

Phenomenon 1: Our system is powered by 220V, so we don’t have to worry about power consumption.

Comments: Low power consumption design is not only for saving electricity, but also has the advantages of reducing the cost of power modules and cooling systems, and reducing electromagnetic radiation and thermal noise interference due to the reduction of current. As the temperature of the equipment decreases, the life of the device is correspondingly extended (the life of semiconductor devices is shortened by half for every 10 degrees increase in the operating temperature of the semiconductor device).

Phenomenon 2: These bus signals are pulled up with resistors, and I feel more assured

Comments: There are many reasons why signals need to be pulled up and down, but not all of them need to be pulled up. When the pull-up and pull-down resistors pull a simple input signal, the current is less than tens of microamperes, but when pulling a driven signal, the current will reach the milliampere level. Today's systems often have 32 bits of address data each, and there may also be 244/245 isolated buses and other signals. If all are pulled up, several watts of power consumption will be consumed by these resistors (don't use the concept of 80 cents per kilowatt-hour to treat these few watts of power consumption).

Phenomenon 3: How to deal with these unused I/O ports of CPU and FPGA? Let's leave them empty for now and deal with them later.

Comment: If an unused I/O port is left floating, a little interference from the outside world may cause the input signal to oscillate repeatedly, and the power consumption of MOS devices basically depends on the number of gate circuit flips. If it is pulled up, each pin will also have a micro-ampere current, so the best way is to set it as an output (of course, other driven signals cannot be connected outside)

Phenomenon 4: This FPGA has so many gates left, so you can use them to your heart’s content

Comment: The power consumption of FGPA is proportional to the number of flip-flops used and the number of flip-flops they flip, so the power consumption of the same model of FPGA at different times in different circuits may differ by 100 times. Minimizing the number of high-speed flip-flops is the fundamental way to reduce FPGA power consumption.

Phenomenon 5: The power consumption of these small chips is very low, so there is no need to consider

Comment: It is difficult to determine the power consumption of chips with less complex internal components. It is mainly determined by the current on the pins. An ABT16244 consumes less than 1 mA without a load, but its indicator is that each pin can drive a 60 mA load (such as matching a resistor of several tens of ohms), that is, the maximum power consumption at full load can reach 60*16=960mA. Of course, the power supply current is so large that the heat falls on the load.

Phenomenon 6: The memory has so many control signals, but my board only needs to use OE and WE signals, and the chip select should be grounded, so that the data can come out much faster during the read operation.

Comment: The power consumption of most memories when chip select is valid (regardless of OE and WE) will be more than 100 times greater than when chip select is invalid, so CS should be used to control the chip as much as possible, and the width of the chip select pulse should be shortened as much as possible while meeting other requirements.

Phenomenon 7: Why do these signals have overshoot? As long as the matching is good, it can be eliminated

Comments: Except for a few specific signals (such as 100BASE-T and CML), all signals have overshoot. As long as it is not too large, it is not necessary to match them. Even if they are matched, they do not have to be matched to the best. For example, the output impedance of TTL is less than 50 ohms, and some are even 20 ohms. If such a large matching resistor is used, the current will be very large, and the power consumption will be unacceptable. In addition, the signal amplitude will be too small to be used. Besides, the output impedance of general signals is not the same when outputting high level and low level, so there is no way to achieve complete matching. Therefore, for the matching of TTL, LVDS, 422 and other signals, it is sufficient to make the overshoot acceptable.

Phenomenon 8: Reducing power consumption is the job of hardware personnel, not software

Comment: Hardware is just a stage, but software is the performer. Access to almost every chip and flipping of every signal on the bus are controlled by software. If the software can reduce the number of accesses to external memory (using more register variables, using more internal CACHE, etc.), respond to interrupts in a timely manner (interrupts are often valid at low levels and have pull-up resistors) and other specific measures for specific boards, it will make a great contribution to reducing power consumption.