Design of RFID middleware system based on ARM

introduction

RFID middleware acts as a bridge between RFID readers and applications. The application side uses a set of common application program interfaces (APIs) provided by the middleware to connect to the RFID reader and collect RFID tag data. Even if the database software or back-end application that stores RFID tag information is increased or replaced by other software, or the types of RFID readers and writers increase, the application side can handle it without modification, eliminating the maintenance complexity of many-to-many connections. Embedded RFID middleware will play an important role in the large-scale application of RFID. In the specific application deployment process, there will be a large number of embedded devices acting as hardware platforms for edge middleware. For many hardware manufacturers who are interested in developing mid-to-high-end RFID readers, using embedded RFID middleware to quickly realize software integration based on hardware integration is an effective measure to help hardware manufacturers quickly upgrade their product lines and meet the needs of enterprises to expand their markets and business scope. Transparency is the key to the entire application of this system. Correctly capturing data, ensuring the reliability of data reading, and effectively transmitting data to the back-end system are all issues that must be considered.

ARM处理器是当今应用最为广泛的处理器芯片之一，低功耗、低成本、高性能等特点使其在消费电子类产品中的竞争力日趋显著。本文提出了一种基于ARM的支持多通信平台的RFID中间件系统设计，可以更广泛、更丰富地推动RFID应用。

1 Hardware Design

The Auto_ID Center has proposed the prototype of the RFID middleware concept called Savant, and has developed the corresponding 1.0 specification draft, technical manual and prototype system, clarifying the most original functions of the RFID middleware. On this basis, this system should have the following functions:

① Manage reading and writing devices and support multiple readers and writers (including different manufacturers and different types).

② Collect, filter and cache data.

③Provide application development interface.

④Interaction with EPC system standard services: *, PML.

⑤Support multiple communication platforms, such as Internet, GSM, GRPS and CDMA.

⑥Integrated control and coordination of peripherals to achieve flexible device control of embedded RFID middleware.

The hardware system block diagram is shown in Figure 1.

1.1 ARM Core Microprocessor

The system is divided into wired communication module, wireless communication module, human-computer interaction module and core module in terms of function. This design uses the processor S3C2410 with 203 MHz ARM920T core from Samscmg Company.

The S3C2410 microprocessor is a multi-purpose general-purpose chip that integrates a microprocessor and common peripheral components. It can be used in various fields, and the instruction processing speed reaches 200MIPS. Its features include: the maximum frequency of the expansion bus is 100MHz, 32-bit data, 27-bit external address lines, the memory controller (8 memory banks) includes a RAM (SDRAM) controller and a NAND controller; boot chip selection during reset (8, 16-bit storage or NAND can be selected); 4 16-bit timers with PWM, an interrupt controller with up to 55 interrupt sources; 3 UARTs, supporting IrDA 1.0; 4 DMA channels (supporting peripheral DMA); supporting STN and TFTL LCD controllers; 2 USB ports; I2C-Bus interface; 2 serial peripheral interface circuits (SPI) and SD card interface. In addition, the standard Linux operating system can be transplanted to the S3C2410, making program development easier.

1.2 Mainboard module

The system memory consists of 1 8M×16-bit Flash (Intel E28F128J3C), with a total of 16 MB Flash and a read/write cycle of 150 ns; and 2 16M×16-bit SDRAM (HY57V561620BT), with a total of 64 MB SDRAM.

S3C2410 provides 8 chip selects nGCSn[0～7], each chip select has a fixed address, and each chip select has a fixed interval of 128 MB. The system memory is composed of 2 16M×16-bit SDRAMs in 32-bit mode, sharing nGCS6. A total of 64 MB RAM. The starting address is Ox30000000. nGCS0 is connected to an 8M×16-bit Intel E28F128 Flash, installed in BANK0, with a starting address of 0x0. The starting address of the kernel is Ox40000, and the starting address of the root file system RAM~DISK is Oxl40000.

1.3 Human-computer interaction module

The system uses the GPIO port to provide 4 keys so that it can respond to key interrupts and obtain key values. Use EINT4 to use PS2 keyboard. S3C2410 has its own LCD controller and touch screen interface. This system uses an LCD display screen model LQ035Q7DB02 and uses MAX1* as the power driver. MAX1* is an active matrix liquid crystal display switching power supply produced by Maxim Corporation of the United States. It has the characteristics of boosting, dual-channel output phase locking, and also provides an LCD backplane driver.

1.4 Wired communication module

The module includes an RS-232 serial interface and a 10/100M adaptive Ethernet interface. This system uses a single-power, low-power RS-232 chip MAX3232. Pins 13 and 8 receive: RS-232 level, the maximum value can reach ±25 V, so pins 12 and 9 output TTL level, the low level is not greater than 0.4V, and the high level is not less than Vcc-0.6V; pins 11 and 10 input TTL level, pins 14 and 7 output RS-232 level, the minimum amplitude is greater than ±5.0V, and the typical value is ±5.4V. When sending data outward, TXD1 has a falling edge, the indicator LED is on, and after MAX3232, the TTL level is converted to RS-232 level. When receiving external data, RXD1 has a falling edge, the indicator LED is on, and the external RS-232 level is converted to TTL level after MAX3232 and enters the microprocessor.

The system expands a 10/100M adaptive Ethernet interface by connecting an external DM9000 Ethernet MAC chip, occupying resources nGCS1/EINTO. DM9000 is a full-duplex high-speed Ethernet control processor of Davicom, which integrates 10/100M PHY, MAC, MMU and 4 KB Dword SRAM. It is compatible with 3.3 V and 5 V power supply. It provides 8-bit, 16-bit and 32-bit three interfaces and 4 multi-function GPIOs. In addition, DM9000 also integrates a receive buffer. S3C2410X supports 2-way USB HOST interface and supports high-speed and low-speed USB devices.

1.5 Wireless communication module

Wireless technology is the most dynamic and promising technology in the current development of communications. RFID middleware that supports wireless access can be deployed in scenarios without fixed network infrastructure, reducing the cost of wired network deployment. RFID middleware can also transmit information to users through wireless communication to improve the real-time nature of information transmission. By implementing the GPRS (General Packet Radio Service) module in the system, the system has mobile communication capabilities. GPRS is the abbreviation of General Packet Radio Service, which transmits in packet mode on PLMN and internal networks interconnected with external networks. In theory, GPRS can provide a transmission rate of up to 115 kbps, but in reality the bandwidth used by users is about 40 KB

~100KB. The access time of GPRS packet switching is less than 1 second, and it widely supports IP protocol. These characteristics of GPRS provide a complete communication solution based on TCP/IP protocol. The principle block diagram of GPRS and Internet connection is shown in Figure 2.

The GPRS communication module uses Sony Ericsson's GR47 to realize the GPRS Internet access function. GR47 is an industrial-grade advanced wireless module with a full set of GSM/GPRS voice and data functions. All functions are concentrated in an integrated chip with an embedded TCP/IP protocol stack. [page]

1.6 Power Supply Design

The core module of the system is powered by a single 3.3 V/0.5 A DC power supply. Since the core module power supply consumes less power, the system uses the LT10856 linear voltage regulator chip, uses the copper foil on the upper and lower sides of the circuit board as the heat dissipation surface, and is powered by a 9 V/0.8 A DC power supply.

In other application designs, according to different power consumption requirements, you can choose between linear voltage regulator solutions and switching voltage regulator solutions. For the former, you can get benefits such as low noise and low cost, but at the same time, it also has disadvantages such as low efficiency and high heat generation; for the switching power supply solution, the advantages and disadvantages are exactly the opposite of those of the linear power supply.

1.7 Other peripherals

The system provides 2 USB HOST interfaces, which can support a variety of USB devices such as USB flash drives and USB cameras. It can be effectively expanded by developing different device drivers.

Using the UDA1380 audio codec can effectively support the playback of audio files in MD, CD, and MP3 formats.

2 Software Design

Linux has powerful performance, is open source and free, has strong platform scalability, complies with POSIX standards, and has powerful network functions. These characteristics have enabled it to develop rapidly in the embedded field in recent years and widely penetrate into the markets of information appliances, network equipment, and handheld terminals. Therefore, this system relies on the Linux operating system and develops applications on it. Middleware software is a multi-level and multi-module software system, which is divided into 3 levels, as shown in Figure 3.

System configuration layer: implements system configuration functions, calls some functional interfaces provided by the lower layer, can not only add basic processing units of the lower layer, but also effectively configure some parameters of the processing units. It includes Web Server interface module and remote control information station module.

Data logic layer: realizes the basic functions of the software system, including reader command processing, tag filtering processing, object *(*) interface, enterprise-level server *interaction (may be changed to interaction with PC middleware). This level completes the logical functions of the system, including device management module, data filtering module, *query module (reserved), and enterprise-level server interface module.

Infrastructure layer: Provides basic functions required for system operation, such as database access and memory management. They provide a unified and stable interface for other modules and shield some differences. This layer includes network management module, memory management module (reserved), and database access module.

2.1 Linux porting

In embedded development, porting the operating system to the development board is the premise and foundation for embedded application development. ARM Linux is an embedded Linux operating system for the ARM architecture. Before compiling the Linux kernel, you must first configure the kernel for specific hardware, including the configuration of the system type. This system selects the ARM system type. After configuring the general kernel options, block devices, and file systems, you can compile the modified kernel file to generate a self-extracting compressed file of the kernel image. By running make clean dep zImage to compile the file, the system will generate a kernel image zImage in the /arch/armnommu/boot directory and download zImage to the 64K address in Flash. When running, copy U-Boot to the OxOc300000 address in SDRAM and start zImage; zImage will decompress itself, decompress it to the OxOc080000 address in SDRAM and start running. After the kernel starts, the system will use romfs as the root file system. Run the make menuconfig command in the linux-dist directory to configure the Linux file system.

2.2 RFID tag data processing

The RFID tag data read by the system mainly undergoes data management, coding management and filtering rule management in the middleware, and then is stored in the local database. Data management includes data verification, data processing and data storage; coding management is to set coding specifications, which can be configured to support different data coding specifications; filtering rule management can support users to configure data filtering rules. The basic process of the system is shown in Figure 4.

The user's parameter configuration information is sent to the middleware software through the message queue. The software analyzes the sent data and makes certain adjustments to the system's working status. At the same time, the system receives data sent from the reader on the network port through the network processing module, and divides these data into two categories: tag data and reader management data. Each reader instance in the system has its own data processing thread, which analyzes its own unique data format to form unified data, and calls the processing method of this reader, and combines the parsed data with the reader's specific data processing parameters to filter and forward the tag data. There is only one management command processing thread in the entire system, which polls the management command processing queue of each reader. If there is command data, the reader's specific processing method is called to process these data.

Conclusion

This paper provides a design scheme for an embedded RFID middleware system that supports multiple communication platforms. RFID middleware that supports wireless access can be deployed in scenarios without fixed network infrastructure, reducing the cost of wired network deployment. RFID middleware can also transmit information to users or systems using wireless communication, improving the real-time nature of information transmission.