Flash microcontroller self-programming technology

The self- programmability of Flash means that the Flash memory can be erased/programmed using the resident software or program in the Flash memory, but the storage area where the program code is running and the storage area to be programmed are not in the same module. Therefore, a microprocessor with only one on-chip Flash memory module cannot execute a program while performing the erase/program Flash operation.

At present, there are two ways to solve this problem: ① During the process of erasing/programming Flash, put the CPU in an idle state; ② Copy the instructions for erasing/programming Flash to RAM and then execute them by the CPU.
TI's MSP430 series Flash microcontrollers have an integrated Flash controller, which can be programmed using an external programmer, or the contents of Flash can be modified using your own program without applying an external programming voltage. When designing a system, you can use the Flash in the chip to save some running data to achieve power-off protection; you can also modify the entire program or partial program in Flash to achieve in-system upgrades.

This article takes TI's MSP430 series Flash chip as an example to further explore how to perform Flash self-programming operations.

1 Structure of MSP430 chip Flash memory

The Flash memory module is a physical memory unit that can be operated independently. All modules are arranged in the same linear address space, and a module can be divided into multiple segments. When programming a bit in a Flash memory segment, the entire segment must be erased. Therefore, the Flash memory must be divided into smaller segments to facilitate erasing and programming. Figure 1 is a block diagram of the Flash memory module on the MSP430 chip. The Flash memory module consists of the following parts:

control logic - machine state and timing generator for controlling Flash erasing and programming;
Flash protection logic - to avoid accidental Flash erasing and programming operations;
programming voltage generator - integrated charge pump that provides all the voltages required for Flash erasing and programming;
three 16-bit control registers - FCTL1, FCTL2, FCTL3 control all operations of the Flash module; and
the memory itself.

2 Flash memory erase and programming operations

Usually, the CPU accesses the Flash to read data or execute programs. At this time, the data and address latches are transparent, and the timing generator and voltage generator are turned off. However, sometimes we need to modify the contents of the Flash during program execution. At this time, we need to set the control register FCTLx appropriately to ensure the correct execution of the erase/program operation. When performing erase/program operations, the timing generator in the Flash module will generate all internal control signals to control the entire execution process. At this time, the CPU cannot access the Flash, so the program instructions to be executed must be called from other places, such as RAM, or the CPU is placed in an idle state. Only when the Flash programming is completed can the CPU regain control of the Flash. The MSP430 series chip integrates only one Flash module as a program and data memory. This means that when programming the Flash, the interrupt vector is inactive and no interrupt request is responded to. All possible interrupt sources (including watchdog) should be blocked before erasing/programming the Flash, as shown in Program 1.

Program 1: Disable all interrupts and Watchdog

DINT; Disable all maskable interrupts
CLR.B &IE1; Disable NMI, ACCV and OF interrupts
MOV #5A80H, &WDTCTL; Turn off the on-chip watchdog

2.1 Direct Flash self-programming

A unique feature of MSP430 is that its Flash module can be self-programmed without copying the program code to other memories. During the Flash self-programming process, when the CPU fetches instructions from the Flash, the Flash will return the value 3FFFh (JMP $) to the CPU, causing the CPU to be in an infinite loop until the end of the Flash self-programming, and then return the next instruction, so that the program continues to execute.

The following program 2 is very easy to implement for the self-programming of the Flash of the MSP430 chip. However, this method also has a disadvantage: during the Flash self-programming process, the CPU is in an idle state, so it can neither execute programs nor respond to interrupts at this time, and this Flash self-programming method can only be used in word or byte programming mode, but not in the faster segment write mode.

Program 2: Use the same module software to write a word to the Flash memory

Fxkey .set 03300h
Fwkey .set 0A500h
… ; Disable all interrupts
MOV #(Fwkey + WRT), &FCTL1 ; Enable Flash programming
MOV #123h, &0FE1Eh ; Program a word
MOV #Fwkey, &FCTL1 ; Program bit reset
XOR #(Fxkey + Lock), &FCTL3 ; LOCK bit set
… ; Enable interrupts

2.2 Flash self-programming through RAM program call

During the erasing and programming of Flash, the CPU can only access the program instructions stored in the on-chip RAM. Copy the program in Flash into the stack, as shown in Program 3. When the Flash is erased, the CPU can execute the program from the RAM. After the Flash erase and write operation is completed, the Flash can be accessed again, the program pointer PC will point to the Flash memory again, and the stack pointer SP will be restored. Executing

the program from RAM allows the CPU to keep running when the Flash is rewritten. Therefore, the MSP430 series chips can still receive data through the UART module during Flash programming. However, whether data is received in this mode can only be determined by querying the UART receive flag.

Program 3: Copy the program instructions in Flash into the stack

Flash_ww
DINT ; Disable all interrupts
CLR.B &IE1 ; Disable NMI, ACCV and OP interrupts
MOV #5A80h, &WDTCTL ; Turn off Watchdog
MOV #Flash_ww_end, R13 ; Define
the end address and length of the program copied into RAM
MOV #Flash_ww_length, R15
MOV #0A500h, &FCTL3 ; Clear LOCK bit
Copy
PUSH @R13 ; Copy the program into RAM
DECD R13
DEC R15
JNZ Copy
MOV SP, R15
MOV #0A54oh, &FCTL1 ; WRT = 1
CALL R15 ; Call the Flash write program in RAM
MOV #0A500h, &FCTL1 ; WRT = 0
MOV #0A510h, &FCTL3 ; LOCK = 1
ADD #2*Flash_ww_length, SP
RET
Flash_ww_start
MOV R14, 0(R12) ；Write 1 byte to Flash
Wait_bf
BIT #1, &FCTL3 ；Detect BUSY bit
JNZ Wait_bf
Flash_ww_end
RET
Flash_ww_length EQU(Flash_ww_end ?Flash_ww_start + 2)/2
ENDMOD

3 Conclusion

The two Flash self-programming methods proposed in this article have their own advantages and disadvantages. When the CPU must respond quickly to events, such as data communication through UART, the method of copying the program code in Flash to RAM and then executing it at the beginning of Flash self-programming is adopted. If the real-time requirement is not high, it is simpler and more direct to put the CPU in idle state during Flash self-programming. It can be believed that with the widespread application of Flash chips and the continuous development of technology, Flash self-programming technology will also have new breakthroughs.