Design of CAN bus intelligent node based on C8051F550

The CAN bus was first designed by the German company BOSCH to solve the monitoring and control system of automobiles. This paper briefly introduces the characteristics and composition of the CAN bus . The working process of the master node and the construction method of the slave node hardware interface circuit are introduced in detail, and the real-time communication of the CAN bus network is realized through software programming of the microprocessor. The entire node communication system works stably and can meet the requirements of the on-site environment. This paper focuses on the design of analog input modules and switch input modules. The C8051F550 microcontroller with a CAN interface is used as the slave node of the system design to collect analog and switch quantities and realize communication with the host computer central controller.

1 CAN bus communication network system

As shown in Figure 1, in this design, the host computer and the bottom module are connected through a communication medium (twisted pair) with a terminator (120 ohm resistor). In the experiment, the matching of the terminal resistance and the impedance of the twisted pair ensures that the data signal will not be reflected at both ends of the bus. The host computer (master node) uses a USB-CAN interface adapter (model GYB507), so that the PC can be directly connected to the CAN bus network through the USB interface and become a standard CAN node. With the use of the bus communication test software CANtool, the sending and receiving status, communication rate and message filtering function of the PC can be directly configured. At the same time, the data communication between each slave node and the PC in the network can be monitored and displayed in real time, which is simple and convenient to use.

2 Smart Node Hardware Design

The traditional slave node design is to connect the CPU to the CAN bus controller and bus transceiver before connecting to the bus network, which complicates the CPU peripheral circuit and greatly affects the entire system. In order to solve this problem, many MCU manufacturers integrate the CAN controller on the MCU. This article uses the C8051F550 MCU, which is an internally integrated CAN controller, which is fully implemented in accordance with the BoshchCAN full-function CAN module, complies with the CAN2.0B protocol, and has a working bit rate of up to 1Mpbs. The controller contains a CAN core, message buffer, message processing state machine and CAN control register. The communication controller has 32 message objects that can be configured to send or receive data. The input data, message objects and their identifiers are stored in the CAN message buffer, which can realize all the functions of the data link layer of the CAN protocol and most of the functions of the physical layer. The CIP-51CPU can directly or indirectly access the CAN control register (CANOCN), test register (CANOTST) and status register (CANOSTA) through special function registers. All other registers can only be accessed indirectly through the CANOADR, CANODATH and CANOTAL registers in address indexing mode.

The driver of the CAN bus uses the isolated CAN bus transceiver CTM1050, with a communication rate of 1Mbps and can connect at least 110 nodes. The internal integrated electrical input stage isolation circuit can isolate a DC voltage of up to 2500V. The input stage is compatible with 3.3V and 5V CAN controllers, the output stage driver has temperature protection, and the internal TVS tube can prevent bus overvoltage function. Compared with the traditional PCA82C250 bus transceiver, the main advantage is that it can be used directly without an external optocoupler, the peripheral circuit is simple and safe, and can meet the use of harsh conditions in industrial sites. Figure 2 shows the interface circuit between C805117550 and CTM1050.

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3 Smart Node Software Design

The communication mode between the three nodes and the host computer in Figure 1 is node 1, 3 and the host computer to realize point-to-point communication. After the microprocessor C8051F550 of nodes 1 and 3 is powered on and reset, it automatically collects analog voltage signals and sends the digital quantity to the host computer through the 12-bit A/D conversion integrated in C8051F550. The host computer monitors the data in real time. If the received data is wrong, the CANtool software can be used to send a custom error data identifier to the two nodes. After the two nodes receive the data, the A/D sampling work is stopped. Nodes 1, 3 and node 2 are master-slave working modes. When the switch quantity of node 2 is pressed, nodes 1 and 3 send the real-time collected data to node 2 and display it on the LCD of node 2.

3.1 Initialize CAN controller

After the C8051F550 is powered on and reset, the INIT bit and CCE bit of the control register CANOCN are set to '1'. Registers are allowed to be initialized and setting information is written. The registers that need to be written mainly include the bit timing register, the extension register, and the command mask register. It mainly completes the configuration of timing parameters and the initialization of message objects. In this design, the crystal frequency used is 11.05MHz, and the bit timing is set to 996.65~1000ns. The initialization procedure is as follows:

3.2 CAN Interrupt Service Routine

The interrupt modes supported by the CAN of C8051F550 include status interrupt and module interrupt. The status interrupt mode occurs when the message is successfully transmitted or an error is detected on the CAN bus. Module interrupt is also called message interrupt. The CAN controller allows the user to configure the message object as an interrupt source as required. This function can be achieved by setting the interrupt pending bit of the message control register. These pending interrupts are pointed to with the highest priority in the CAN interrupt register, regardless of the timing. The status interrupt has the highest priority, and reading the status register will automatically clear the status interrupt value (8000h). The message interrupt priority decreases as the message number increases. The message interrupt is cleared by clearing the INTPND bit of the message object. The interrupt service flow chart is shown in Figure 3.

4 Conclusion

The bus communication network of this system has realized the connection between the three nodes and the host computer. The system software adopts a structured programming scheme, which makes it have good modularity and portability. It can be easily reprogrammed for different system functions or different application environments.

The master-slave intelligent node in the CAN bus communication network designed in this paper has been tested and debugged. The hardware circuit works normally and has strong anti-interference ability in the bus data acquisition system. The software part has strong real-time performance and high accuracy. The slave node can transmit information to the master node in real time so that the master node can monitor in real time. The entire node communication system works stably and can meet the requirements of the on-site environment.

During the design process, we realized that the current CAN controller based on CAN2.0B protocol cannot dynamically assign priority to real-time and non-real-time data, and the access mechanism based on event trigger mode cannot meet the real-time access of many nodes.