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Characterization of Integrated RF Hardware in 5G Applications [Copy link]

Some manufacturers of 5G systems are moving to higher levels of hardware integration and combining RF converters and baseband processing engines in system-on-chip (SoC) devices to address power consumption and board space issues. While this integration has benefits, engineers responsible for characterizing these systems face new challenges in accessing data because previously standalone RF data converters will now be combined with FPGAs and processors on the same chip.

Another factor that is troubling engineers is the 5G standard itself. As a new standard, 5G is likely to evolve moving forward, so engineers need to deal not only with changes in how to obtain characterization data in integrated devices, but also with possible changes in reference waveforms and performance standards. This adds an additional burden to the characterization process, which needs to be flexible enough to cope with changing requirements.

To enable data access through SoCs and to cope with potentially changing standards, the ideal characterization environment requires flexible signal generation and analysis capabilities that can not only generate waveforms that comply with current 5G standards, but also generate new waveforms as standards evolve. This signal generation and analysis capability also needs to be able to extract RF data from new SoC hardware without requiring RF engineers to become experts in programming SoCs.

If this signal generation capability is included in the same desktop environment as signal capture and analysis capabilities, engineers can perform many RF test and characterization tasks without the need for traditional benchtop test equipment.

Virtual test equipment vs. traditional test equipment

While there will always be a place for benchtop signal generators, spectrum analyzers, and other related traditional test equipment to verify system performance, the cost and physical size of these instruments make them less popular during the initial characterization and "what-if" phases of system design. Allowing algorithm developers, RF engineers, and system designers access to their virtual test "lab" can accelerate design iterations and help get to the best design faster.

Poor choices for hardware and algorithms can be eliminated early in the design process without tying up expensive shared resources such as benchtop test equipment, let alone the associated test personnel who own that equipment. Similarly, good design ideas can be quickly identified and developed to a higher degree before undergoing a more extensive testing process, greatly increasing the likelihood of passing certification without requiring extensive hardware rework, thereby saving development time and cost.

The goal here is not to replace desktop testing but to add software-based testing earlier in the process, thereby reducing hardware prototype build costs and increasing engineering productivity.

But how can such a desktop characterization environment be used with prototype hardware for 5G system development? Figure 1 shows the software characterization setup for a SoC device consisting of an 8-channel RF ADC and 8-channel RF DAC integrated with programmable logic and an MCU-based processing system.

Figure 1. The EFSoC Development Kit connected to a PC-based test environment.

The signal will be generated on the PC through the MATLAB application, then sent to the Zynq UltraScale+ RFSoC device, output the device's DAC, pass through the ADC and return to the PC. The PC-based application RFSoC Explorer will manage the data transmission, signal generation and various analysis functions, as shown in Figure 2.

Figure 2. Screenshot of the RFSoC Explorer characterization tool

This “closed-loop” testing reduces the need for external test equipment and allows the user to characterize the performance of the ADC and DAC on the RFSoC to a level sufficient to make a determination on the suitability of the hardware.

This software-based test approach enables RF engineers to access data converters embedded in SoCs without having to program the device itself to enable data access and provides the flexibility needed for signal generation, allowing users to modify waveforms as needed as standards evolve.

Extended test methods

While software-based test approaches enable quick decisions about suitability, they also have limitations, primarily the speed of the communication channel between the hardware and the host and the speed of signal analysis in the test software itself. If the test requires faster signal analysis data rates, the same software front end can be used to generate the signals, connecting traditional test equipment to the RFSoC output for data analysis. This approach still allows waveform programmability while mitigating the impact of potential communication bottlenecks.

Additional test scenarios include using the programmable logic on the RFSoC device as its own signal generator, or adding logic in the device to create its own test scenarios, such as setting certain trigger conditions on the incoming data and capturing only the data of interest for further analysis on a PC, rather than streaming all the data.

This post is from RF/Wirelessly

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It's so complicated, it takes some time to digest.   Details Published on 2020-10-31 19:13
 

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Good sharing, thanks.

This post is from RF/Wirelessly
 
 

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It's so complicated, it takes some time to digest.

This post is from RF/Wirelessly
 
 
 

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