Online UPS Hardware Design Based on ARM LPC2214

1 Overview

At present, there are two main development directions for UPS: one is the continuous strengthening of new functions, such as adding remote monitoring, automatic diagnosis, identification, event recording, fault warning and other functions; the other is the improvement of its own efficiency. The use of high-efficiency IC chips and new manufacturing processes has continuously reduced no-load power consumption and further improved power density. Compact and dense space design has brought new solutions to the application of small electronic equipment.

Introducing a powerful embedded microprocessor (LPC2214 is selected in this article) system into UPS can enhance the function of UPS, make it networked and intelligent, and meet the power requirements of many unattended base stations. Replacing analog control with digital control can eliminate the problems of analog devices such as temperature drift and aging; strong anti-interference ability is conducive to parameter setting and adjustment; strong versatility makes it easy to adjust the scheme and implement a variety of new control strategies by changing the program software; at the same time, highly integrated digital circuits can reduce the number of components, simplify the hardware structure, reduce development costs, and improve system reliability.

2 System Hardware Design

Regardless of whether the mains power is normal or not, the inverter part of the online UPS power supply is always in working condition. The inverter provides voltage stabilization and regulation functions, plays a "purification" role in the power supply of the power grid, and also has overload protection functions and strong anti-interference capabilities. The power supply quality is stable and reliable, and it is widely used in UPS types of various topologies and configuration structures. Therefore, the design scheme of this article adopts the topology of three-order conversion, namely AC-DC-AC.

2.1 System composition and working principle

The system structure block diagram is shown in Figure 1. When the mains power is normal, the mains power input UPS is filtered and PFC, and then boosted to 400 V DC; then it is inverted into 220 V AC by the inverter and transmitted to the load; at the same time, the 400 V DC is stepped down by the Buck buck circuit to charge the battery. When the mains power is cut off, the battery supplies power to the bus through the Boost topology boost circuit, and then inverts into 220 V AC. The A/D module of LPC2214 collects the working information of each point, and the main control chip analyzes the data, makes judgments based on the set parameters, makes corresponding changes, and stores the generated related record information in NANDFlash. The remote interface is connected to the host computer through the network, and the user can make relevant settings and remote control in the monitoring center.

2.2 ARM main control module and drive circuit

LPC2214 is a 16/32-bit ARM7TDMI-S CPU microcontroller that supports real-time simulation and tracing. It has 256 KB of high-speed Flash memory, a 128-bit memory interface and a unique acceleration structure that enables 32-bit code to run at the highest clock frequency; it has a wealth of peripheral interfaces, such as A/D converter, PWM unit, 32-bit timer, vector interrupt controller, serial port, I2C interface, etc., which can simplify the design of hardware circuits, such as A/D acquisition, PWM modulation circuit, etc.; the internal clock frequency can reach 60 MHz, and the A/D conversion time is as low as 2.44μs, which can fully meet the increasing UPS operating frequency and functional requirements. PFC, DC/DC, and DC/AC are the main energy conversion parts in the system. The DC/DC part includes Buck battery charging circuit and Boost battery boost circuit. All PWM control is completed by a single LPC2214.

LPC2214 has 6 PWM outputs. By configuring the function registers, the duty cycle and timing frequency can be set. 6 single-edge controlled or 3 double-edge controlled PWM outputs, or a mixture of these two types of outputs can be realized. It has a double buffering function to meet the system design requirements. PWM1 and PWIVE drive PFC, PWM3 drives the Buck battery charging circuit, PWM4 drives the Boost battery boost circuit, and PWM5 and PWM6 drive the inverter circuit. Since the output capability of the I/O pin of LPC2214 is weak, a drive circuit is required to drive the MOSFET power tube. The drive circuit uses an indirect magnetic isolation voltage type drive circuit. LPC2214 drives PN2222 (Q1). When the output is high, Q1 is turned on, the VCC voltage is applied to the primary of TP1, and the secondary obtains the induced voltage. At this time, the voltage charges the gate of VTP1 through R1, making it turned on. When the LPC2214 outputs a low level, Q1 is turned off, and the primary coil of the transformer TP1 continues to hinder the change of current due to the effect of inductance, generating an induced potential, which increases the collector voltage of Q1. D1, R2 and C1 form an absorption circuit to absorb and consume the generated induced electromotive force to prevent the voltage from rising and breaking Q1. The secondary of the transformer also generates an induced potential, QP1 is turned on, and the gate storage charge of VTP1 is released through QP1, accelerating the shutdown of VTP1. The IGBT drive circuit is shown in Figure 2.

2.3 Sampling and A/D Module

The acquisition circuit collects the voltage, input current, output voltage, output current, battery voltage, charging current, and discharge current of the input power grid. LPC2214 performs calculations based on the collected data to control the duty cycle of PWM so that it outputs the corresponding square wave. The A/D module of LPC2214 is a 19-bit successive approximation analog/digital converter with a measurement range of 0 to 3 V and one or more input Burst conversion modes; the basic clock is in VPB clock mode, and the programmable divider can adjust the clock to 4.5 MHz required for the step-by-step conversion. Voltage signal acquisition is divided into two circuits: AC voltage sampling and DC voltage sampling. The AC voltage signal is divided into a signal of -1.5 to +1.5 V by resistors. A negative voltage bias is added through the operational amplifier circuit to shift the sampled signal to the range of 0 to 3 V to meet the A/D acquisition range. After the DC voltage signal (such as a 400 V bus) and the battery voltage are stepped down by the voltage divider circuit, they directly enter the acquisition end of the A/D converter.

The current signal is also divided into AC current and DC current, and the Hall current sensor LA58-P is used for current/voltage conversion. The voltage signal generated by the AC current is also connected to the corresponding A/D converter acquisition port after being stepped down and biased by a negative voltage. The voltage signal corresponding to the DC current is collected and stepped down by a voltage divider resistor and enters the A/D acquisition terminal. Figure 3 is a sampling bias circuit for AC voltage and AC current. Among them, Vi is the voltage signal generated by the Hall sensor.

In addition to the acquisition signals introduced above, there are also signal parameters related to UPS use, management, and maintenance, such as battery temperature, ambient temperature, and phase detection. Depending on the different acquisition parameters, there are circuits for their respective applications.

2.4 Power supply module

LPC2214 works with dual power supply, which is divided into CPU operating voltage (1.8 V) and I/O operating voltage (3.3 V), and two voltage power supplies are required accordingly. The low voltage dropout linear regulator LDO used in this design is TI's TPS73xx series regulator, which stabilizes the 5 V voltage into 3.3 V and 1.8 V of the main control chip. The TPS73xx series chip has dual output, the output current can reach 250 mA, the internal integrated voltage monitor monitor, low noise, and excellent load/line transient response. Figure 4 shows a dual LDO power supply. The 5 V power supply comes from the flyback switching power supply designed with FSDM0265 from Fairchild. The flyback switching power supply is designed with an input voltage of AC 85~265 V. When the mains power is normally supplied, the mains power is used; when the mains power grid is off, the battery voltage is used to supply power to the flyback switching power supply to generate the low-voltage DC power supply used in the circuit.

2.5 Working Storage Module

The working storage module uses NAND Flash K9F2G16U0M. It uses nonlinear macrocell mode inside, solid-state large-capacity storage; the capacity is 256 MB, using page write mode; connected to the data bus through a parallel data interface, it can be stored or read quickly.

Working information is divided into environmental information and system information. Environmental information includes grid voltage, ambient temperature, etc.; system information includes input current, input voltage, output voltage, output current, charging voltage, battery information, power-off times, power-off time, etc. Battery information is further divided into battery temperature, discharge degree, discharge current, charging time, battery voltage, etc. In order to facilitate data movement, a USB module is connected to the bus. The USB chip uses Philips' high-performance USB interface device PDIUSBD12. Users can upload data in the storage module through network monitoring, or copy data with a mobile data storage device. As shown in Figure 5, the data is stored in K9F2G16U0M during operation. When it is detected that the USB is externally connected, the currently stored data is packaged and sent through the USB interface.

2.6 Network Interface Module

The UPS system is developing towards networking and intelligence, so a network interface is designed in the main control module circuit, as shown in Figure 6.

The network interface module uses the CP2200 chip. The CP2200 is an independent Ethernet controller launched by Silicon Labs. It complies with the IEEE802.3 protocol, has a built-in 10 Mbps Ethernet physical layer device PHY and a media access controller MAC, and has programmable padding and CRC automatic generation functions; it has programmable filtering functions and special filters, which can automatically evaluate, receive or reject Magic Packet, unicast, multicast and other information packets; it supports Intel and Motorola bus modes; it has an 8 KB Flash memory and can be flexibly programmed. The remote interface can not only provide users with remote monitoring and other services, but also upgrade the system software through the network interface. In Figure 6, the FC-518LS isolator electrically isolates the network from the main control chip, protects the system from interference from clutter signals in the network, and improves the stability of the system.

3 Conclusion

The digital UPS based on LPC2214 simplifies the hardware design of the circuit, reduces the hardware cost, improves the reliability of the UPS, expands the upgrade space and product diversity. By building an experimental circuit and combining it with the program, the correctness of the design is verified, providing a certain experimental basis for subsequent research.