How to use load sharing to increase output current capability

introduction

One of the main integrated circuit (IC) selection criteria in highly space-constrained applications such as portable electronic devices is package size. Most analog IC manufacturers are able to provide very space-efficient packages such as uDFN or uCSP. However, the main limitation of these ultra-small packaged ICs in terms of analog power distribution is power dissipation. Therefore, the maximum current capability of DC-DC converters is in the range of 1.5 A to 2 A. Although this current is sufficient for most applications, some applications may require currents exceeding 1.5 A to 2 A. In this case, it is challenging not only for handheld device designers but also for IC manufacturers to use ultra-small packaged DC-DC converters ; and as higher power requirements emerge, the lineup of highly integrated ICs below 1.5 A that were previously widely available in the industry has been greatly narrowed.

To provide such a large output current, connecting two general-purpose DC-DC converters in parallel may be a cost-effective solution. This approach may also be adopted due to factors such as thickness, space saving, and heat dissipation advantages.

However, DC-DC converters have tolerances when regulating the output voltage, which include parameters such as bandgap drift, comparator offset, and closed-loop regulation. Designers must also consider the resistor accuracy when using converters with external resistor bridges.

This article will detail the methods and techniques for designing a power supply with two parallel DC-DC converters . Finally, a cost-effective and space-efficient solution and its application design will be discussed, which uses a highly integrated dual-channel buck converter to provide 1.6 A current capability.

NCP1532

NCP1532 Dual-Channel Step-Down DC-DC Converter is a monolithic integrated circuit designed specifically for portable applications powered by 1 Li-Ion or 3 Alkaline/NiCd/NiMH batteries to power the core and input/output (I/O) voltages of new multimedia designs. Both channels are adjustable from 0.9V to 3.3V and can provide up to 1.6A of total current, with a maximum current of 1.0A per channel. Both converters operate at a 2.25MHz switching frequency, enabling the use of smaller inductors (down to 1μH) and capacitors to reduce component size, and can also operate 180o out of phase to reduce the large current demand on the battery. The device automatically switches between PWM/PFM modes and uses synchronous rectification technology to provide higher system energy efficiency.

External components must be evaluated

Connecting two DC-DC converters in parallel to increase output current capability requires additional ballast resistors to prevent the two converters from being set to exactly the same voltage. In fully integrated dual-channel DC-DC converters such as the ON Semiconductor NCP1532 , drift from the error amplifier and reference voltage is negligible. However, engineers need to minimize these ballast resistors to reduce power losses, optimize solution efficiency, and ensure acceptable load regulation.

The following assumptions are used to calculate the ballast resistor:

● Both converters use the same reference voltage. However, due to the tolerance of external resistors, the regulated output voltage of each channel is not the same. We can assume that channel 1 is regulated at the high end of its tolerance, while channel 2 is regulated at the low end of its tolerance;

● The ballast resistors will ensure that the two converters cannot exceed their maximum output current, which is 1 A per channel;

● The resistance values ​​of the two RSHARE ballast resistors are the same.

Based on the above assumptions, the electrical parameters corresponding to Figure 2 can be used to calculate the ballast resistor:

Where VOUT is the output voltage; TOLOUT is the margin provided by the external shunt ratio, determined by equation (2); IOUT is the maximum output current per channel; and ILOADmax is the maximum rated current.

The total output voltage reference TOLOUT depends on the accuracy of the external shunt TOLR:

Taking NCP1532 as an example, the parameters required to complete the ballast resistor calculation are: feedback voltage threshold VFB = 0.6 V; maximum output current IOUT = 1.0A; maximum rated current ILOADmax = 1.6A; output voltage VOUT = 1.2V, the tolerance of the DC-DC output with a resistor shunt accuracy of 0.1% is:

In addition to the few external components described in the first section of the Typical Application Schematic, this interleaved NCP1532 dual-channel application schematic uses two 0.1% precision resistor bridges and two 6mW ballast resistors connecting the filter outputs to the external loads.

Simulation diagram showing the effect of ballast resistance on load voltage regulation

Figure 4 simulates our design example if we consider both channels as proper voltage sources—configured to provide 1.2V ±0.1% accuracy.

The 6mW ballast resistor compensates for the high-side and low-side tolerance of the resistor shunt without exceeding the maximum output current capability. However, this approach affects the load regulation performance by 4.8mV at 1.6A and increases series losses.

The key to improving energy efficiency is to minimize the RSHARE ballast resistance

The key factor in minimizing series losses is to minimize the ballast resistor RSHARE determined by equations (1) and (2). The initial assumption based on a dual-channel DC-DC converter can reduce these series resistor values ​​to a considerable extent. Therefore, the power loss at a 1.6A load can be calculated in the load-sharing case:

In the case of balanced load, it can be concluded that:

Compared with the power provided by the load:

When using a dual-channel DC-DC converter , the impact of the ballast resistor on energy efficiency (8.2mW/1.92W=0.0043) is less than 0.5%.

Interleaving two independent 3% accurate DC-DC converters will require a higher value ballast resistor; this will significantly affect load regulation and efficiency. The ballast resistor has been calculated to be 180mΩ for 3% accuracy. Using two independent DC-DC converters will affect efficiency by 12%, which is unacceptable for portable devices.

Load transient performance confirms design effectiveness

Using two separate channels facilitates reacting to large load transient events. Furthermore, this load sharing approach enables the use of higher frequency, wider bandwidth devices than a “super” DC-DC converter . High switching frequencies require smaller inductors, and smaller inductors take less time to react to current changes. Figure 5 details an 800mA load transient and 1μs rise time associated with the Figure 3 application circuit.

The transient performance confirms the high bandwidth and stability of the system: acceptable overshoot, no ringing, and fast recovery. Figure 5 shows that the voltage drop under an 800mA load transient is less than 40mV, while the rise time is 1μs. This measurement confirms the validity of the load sharing analysis and further enhances the main benefits of this solution.

Out-of-phase operation reduces transient noise and EMI on the battery line

Advanced DC-DC buck converters can have synchronous features to reduce switching noise and reduce electromagnetic interference (EMI). The dual-channel buck converters in our example can operate out of phase; this option can be selected externally. In that control mode, the switching events of the first converter are opposite (180o apart) to the switching events of the second converter. In addition, the power demand on the battery line is distributed across the two operating phases, and the triangular waveform disappears when using out-of-phase operation. The spikes that occur when the high-side and low-side transistors turn on and off are also greatly reduced.

Space requirements and wiring

Applying High Frequency DC-DC Converters Some rules need to be observed in order to obtain powerful portable applications.

Good layout is key to prevent the switching regulator from generating noise both on itself and in the application. In fact, similar to any closed-loop system, special attention is required to protect the feedback pin from any external parasitic signal coupling. Since portable digital circuits consume a lot of current, designers must check the loop formed by the high current path from the battery to the ground plane from input to output, especially the so-called current loop.

Usually at least 4 layers of printed circuit boards are used, including ground and power layers. The high current path (inductor capacitor (LC) filter and ballast resistor) is designed on the top, while the sensitive feedback network is located at the bottom.

Conclusion

Interleaving 2 general-purpose DC-DC converters is a value-added feature for applications that require high current . Compared to a single "super" standalone DC-DC converter , load sharing technology spreads the power and noise across 2 different channels, so less cooling effort is required to keep the devices at the same temperature. External components such as input and output capacitors and inductors are smaller and can help save space on the application board.

Load sharing is an excellent method for applications with very heavy loads and large load transient demands if the effect of ballast resistance on load regulation and efficiency is minimized .

ON Semiconductor’s NCP1532 is a space-efficient and cost-effective solution that applies this technology.