A brief analysis of low power consumption technology in embedded system design

　　0 Introduction

　　With the development of science and the continuous innovation of microelectronics technology, the application of embedded systems is increasing and has been widely penetrated into various fields. Embedded systems are application-centric, based on electronic technology and computer technology, with tailorable software and hardware, and can adapt to the strict requirements of application systems in terms of function, reliability, stability, cost, size, power consumption, etc. Special computer systems.

　　In the design of embedded systems, low-power design technology has become a problem that many designers are gradually concerned about. The reason is that embedded systems have been increasingly used in portable and highly mobile products, and these products often rely on batteries for power supply. In fact, over the years, the energy storage density of batteries has not made much progress. For portable devices , especially handheld consumer products, it does not seem to be completely practical to increase battery capacity alone to improve battery life. Therefore, in order to improve device performance, designers need to consider reducing the energy consumption of the hardware system itself from every detail. In order to extend the battery life as much as possible. In fact, low-power design has become an increasingly urgent issue, so low-power design in embedded systems should be considered from both hardware and software aspects.

　　1 Low power consumption design of hardware

　　1.1 Hardware Circuit Devices

　　Since most circuits now use integrated circuit CMOS process technology, compared with the previous TTL process, it has played a role in reducing the power consumption of electronic components and the overall system. Therefore, CMOS integrated circuit process technology should continue to be used. In addition, due to the use of CMOS integrated process technology, the static power consumption of the circuit is very small (negligible), while the dynamic power consumption is large, because dynamic power consumption refers to the power consumption generated when the high and low levels of the circuit are flipped. During the transition period of the high and low levels of the circuit, the current is very large and there is a large power consumption. Therefore, reducing the power consumption of the hardware circuit is mainly to reduce the dynamic power consumption of the circuit. The dynamic power consumption formula is:

　　Among them, P represents the dynamic power consumption of the CMOS chip, C represents the load capacitance of the CMOS chip, and V and f represent the operating voltage and operating frequency of the CMOS chip respectively. It can be seen from the formula that the power consumption of the CMOS hardware integrated circuit is closely related to the operating voltage and operating frequency. Therefore, when using the CMOS series circuit, the unused input terminals should not be left floating, because the floating input terminals may have inductive signals and may cause high and low level conversion. At the same time, since the power consumption of the conversion device is very large, the principle of high output should be adopted as much as possible.

　　1.2 Selection of low-power peripheral devices

　　There are many ways to implement the same function. For example, the internal memory RAM of the embedded system can be converted to external flash memory FLASH as much as possible, because under the same conditions, reading the internal RAM will consume more power than reading the external FLASH. It can also be implemented using discrete components, small-scale integrated circuits, large-scale integrated circuits, or even single chips. Generally, the fewer components are used, the lower the power consumption of the system. Therefore, highly integrated devices should be used as much as possible to reduce the number of components used in the circuit and reduce the power consumption of the entire machine. 　　1.3 Selection of microprocessor

　　The power consumption of embedded microprocessors accounts for a considerable part in embedded systems, so choosing a suitable processor has a great impact on the overall power consumption of embedded systems. The power consumption of a microprocessor is mainly divided into two parts: core power consumption Pcore and external interface controller power consumption Pio. The total power consumption is equal to the sum of the two, that is, P=Pcore+Pio. For Pcore, the key lies in the power supply voltage and clock frequency; For Pio, in addition to the power consumption of each dedicated I/O controller, there is also the address/data bus width, because the wider the bus width, the greater the processing power and the greater the power consumption. Therefore, to reduce power consumption, it is necessary to narrow the number of bus bits.

　　To reduce the power consumption of the Pcore of the microprocessor core, we must find ways to reduce the operating voltage and clock frequency of the processor. Reducing the operating voltage of the microprocessor is a very effective way and is also a trend of future development. At present, the operating voltage of many embedded microprocessors can be reduced to below 2 V. And high-efficiency processors provide a variety of clock frequencies and operating voltages to save power to the maximum extent. In addition, when designing the system, if the operating voltage is not much different and the system processing capacity permits, the clock frequency of the microprocessor should be reduced as much as possible to achieve energy saving. Taking SAMSUNG S3C2410 (32-bit ARM 920T core) as an example, it provides four working modes: normal mode, idle mode, sleep mode, and shutdown mode. The power consumption in various modes is listed in Table 1.

Table 1. Comparison of clock frequency and power consumption in different working modes

　　As can be seen from Table 1, when the CPU is running at full speed, it consumes much more power than when it is idle or in sleep mode. The principle of power saving is to make the normal operation mode take up much less time than the idle and sleep modes. In devices like PDAs, the system runs at full speed much less than when it is idle, so the CPU can be set to work in idle state as much as possible, and then wake up the CPU through the corresponding interrupt when it is used, so as to restore to normal working mode to handle the response event, and then enter idle mode. Therefore, when designing the system, if the processing power permits, the processor clock frequency can be reduced as much as possible.

　　The processor clock frequency can also be changed dynamically to reduce power consumption. For example, unnecessary peripheral controllers can be turned off and the clock frequency can be lowered when the CPU is idle; when it is in operation, the clock frequency can be increased to speed up the operation.

　　1.4 Multi-CPU System

　　Although there are various technologies that can improve performance without increasing the power consumption burden, using one chip to handle multiple tasks is no longer a good choice. First, these functions may have different requirements for chip processing functions, and second, a chip that is burdened with multiple tasks needs to have a very high speed, so it becomes very difficult to reduce power consumption, which makes multi-CPU systems (MPCore) an inevitable trend. An obvious advantage of multi-CPU systems is that different CPUs can be used to perform their respective duties according to different task processing needs, so as to give full play to their own advantages and give the system the most optimized performance. Another advantage is the control of power consumption: if a single CPU is used to complete all functions, a very high CPU speed is inevitably required, resulting in high power consumption and a lot of energy waste. Multi-CPU systems can reasonably start and stop the corresponding CPUs according to different tasks to complete tasks, and keep them in a dormant state when not needed, thereby maximizing power consumption control. 　　1.5 Partition/time-sharing power supply technology

　　For an embedded system, the workload of the system is changing all the time, and it is impossible for all components to work at all times. Therefore, the partition/time-sharing power supply technology can be used to reduce power consumption. The power supply unit can be controlled by a switch. When a part of the circuit is in a dormant state, the power supply of this part of the circuit is turned off, and only the working components are powered. The power supply principle is shown in Figure 1.

Figure 1 Schematic diagram of the time-division technology

　　2 Low power consumption design of software

　　2.1 Optimizing Compiler

　　In embedded system design, software plays a leading role in guiding hardware activities and has a great impact on the energy consumption of the system. In the past few years, research has mainly focused on the hardware part, but now, researchers and designers are more focused on reducing system power consumption by optimizing the software part. To optimize the software, you must choose the correct compilation method to reduce the power consumption of program execution. The role of the compiler is to translate programs written in high-level languages ​​(such as C/C++, etc.) into programs that can be executed on the target machine. At the same time, the readability and maintainability of the program are guaranteed, which improves the efficiency of software development. In addition, to port the program to a new target machine, you only need to recompile the program with the corresponding compiler without having to rewrite the program. However, in some cases, this will affect the execution performance of the program. The effectiveness of the compiler and the efficiency of the code it generates can be compared with the assembly language code. In fact, in a program, each instruction will activate certain hardware components in the microprocessor, so the correct selection of instructions can reduce the power consumption of the processor. By optimizing the compiler, effective software low power can be achieved, thereby generating more efficient code to reduce the power consumption of embedded devices.

　　2.2 Using software instead of hardware circuits

　　General hardware circuits have power consumption, so hardware circuits with data operation and processing functions can be implemented by software, such as filtering circuits, exponential and logarithmic operation circuits, anti-interference circuits, etc. However, nothing is absolute. Whether some hardware circuits can be implemented by software, in addition, it is also necessary to consider processing a large amount of software data, the need to improve the performance and power consumption of the processor, etc., and whether this is cost-effective.

　　2.3 Interrupt-driven technology design

　　The entire embedded system software is designed to handle multiple events. When the system is powered on and initialized, the main program only initializes the system (including registers, external devices, etc.). After the initialization is completed, it enters a low-power state, and then all devices controlled by the CPU are connected to the interrupt input terminal. When an event occurs in the peripheral, an interrupt signal is generated, causing the CPU to exit the power-saving state and enter event processing. After the event processing is completed, it continues to enter the power-saving state.

　　When designing embedded programs, whether a program uses interrupt mode or query mode is not so important for some simple applications, but it is far from important in terms of low power consumption. When using interrupt mode, the microcontroller can do nothing, or even enter wait mode or stop mode; while in query mode, the microcontroller must constantly access registers, which will bring a lot of extra power consumption. Therefore, when designing with software, unless the system itself requires the use of query mode, interrupt mode should be used as much as possible for programming. 　　2.4 Use of timer delay program

　　When a delay program is needed in software design, designers should use the timer delay method to design. This is because, usually when the embedded processor enters standby mode, the CPU will stop working, while the timer can work normally. Since the power consumption of the timer is very low, when the processor calls the delay program, the embedded system can enter standby mode. At this time, the timer can continue to work. Once the timing time is over, the CPU can be awakened to work again. This not only reduces the CPU power consumption, but also improves the CPU's work efficiency. If the query method is used, the CPU will continuously query the system. Since the CPU is working all the time, this is not only inefficient, but also the processor power consumption is very high.

　　2.5 Algorithm Optimization

　　Optimization algorithms often appear in embedded DSPs. They use a large number of ready-made formulas and calculation methods to save time in system internal operations and reduce power consumption. In addition, within the allowable error conditions of the embedded system, simpler functions can be used to approximate complex functions for calculations, thereby reducing power consumption.

　　3 Conclusion

　　The design of embedded systems involves two aspects: hardware design and software design. In actual system applications, low-power design is not a unilateral factor. It is necessary to comprehensively consider various possible reasons, conditions and states. Hardware design and software design should be considered together, and the details should be carefully analyzed. At the same time, various possible solutions and methods should be calculated and summarized. Only in this way can a more satisfactory effect be achieved and the goal of reducing system power consumption can be achieved.