Analysis and comparison of various ADCs - comprehensive learning of analog-to-digital converters

Analysis and comparison of various ADCs

A/D conversion technology

Today's software radio and digital image acquisition require high-speed A/D sampling to ensure effectiveness and accuracy. General measurement and control systems also hope to make breakthroughs in accuracy. The wave of human digitization has promoted the continuous transformation of A/D converters, and A/D converters are the pioneers of human digitization.

Successive approximation type, integral type, voltage-frequency conversion type, etc. are mainly used in medium-speed or low-speed, medium-precision data acquisition and intelligent instruments. Hierarchical and pipeline ADCs are mainly used in transient signal processing, fast waveform storage and recording, high-speed data acquisition, video signal quantization and high-speed digital communication technology under high-speed conditions. In addition, high-speed ADCs using structures such as pulsation type and folding type can be used in baseband demodulation in broadcast satellites. ∑-Δ ADCs are mainly used in high-precision data acquisition, especially in electronic measurement fields such as digital audio systems, multimedia, seismic exploration instruments, and sonar. The following is a brief introduction to various types of ADCs.

1. Successive approximation ADC

Successive approximation ADC is a widely used analog/digital conversion method, which includes a comparator, a digital-to-analog converter, a successive approximation register (SAR) and a logic control unit. It continuously compares the sampled input signal with the known voltage. One clock cycle completes the 1-bit conversion. N-bit conversion requires N clock cycles. After the conversion is completed, a binary number is output. The resolution and sampling rate of this type of ADC are contradictory. When the resolution is low, the sampling rate is high. To improve the resolution, the sampling rate will be limited.

Advantages: When the resolution is lower than 12 bits, the price is low and the sampling rate can reach 1MSPS; compared with other ADCs, the power consumption is quite low. Disadvantages:

When the resolution is higher than 14 bits, the price is higher; the signal generated by the sensor needs to be conditioned before the analog/digital conversion, including gain stage and filtering, which will significantly increase the cost.

2. Integral ADC

Integral ADC is also called dual slope or multi-slope ADC, and it is also widely used. It consists of an analog integrator with an input switching switch, a comparator and a counting unit. It converts the input analog voltage into a time interval proportional to its average value through two integrations. At the same time, the counter is used to count the clock pulses during this time interval to achieve A/D conversion.

The time of the two integrations of the integral ADC is determined by the same clock generator and counter, so the obtained D expression is independent of the clock frequency, and its conversion accuracy depends only on the reference voltage VR. In addition, since an integrator is used at the input end, it has a strong ability to suppress the interference of AC noise. It can suppress high-frequency noise and fixed low-frequency interference (such as 50Hz or 60Hz), and is suitable for use in noisy industrial environments. This type of ADC is mainly used in low-speed, precision measurement and other fields, such as digital voltmeters.

Advantages: high resolution, up to 22 bits; low power consumption and low cost.

Disadvantages: low conversion rate, the conversion rate is 100-300SPS at 12 bits.

3. Parallel comparison A/D converter

The main feature of the parallel comparison ADC is its high speed. It is the fastest of all A/D converters. Most of the modern high-speed ADCs adopt this structure, and the sampling rate can reach more than 1GSPS. However, due to the limitations of power and volume, the resolution of the parallel comparison ADC is difficult to be very high. The conversion of

all bits of the ADC of this structure is completed at the same time, and its conversion time mainly depends on the switching speed of the comparator, the transmission time delay of the encoder, etc. Increasing the output code has little effect on the conversion time, but with the improvement of resolution, high-density analog design is required to realize the large number of precision voltage divider resistors and comparator circuits required for conversion. If the output number increases by one bit, the number of precision resistors will double, and the number of comparators will also increase by approximately one time.

The resolution of the parallel comparison ADC is limited by the size of the tube core, input capacitance, power, etc. If the accuracy of the repeated parallel comparators is not matched, static errors will also be caused, such as increasing the input offset voltage. At the same time, this type of ADC will also produce discrete and inaccurate outputs, the so-called "spark code", due to the metastable voltage and coding bubbles of the comparator.

Advantages: The highest analog/digital conversion speed.

Disadvantages: Low resolution, high power consumption, and high cost.

4. Voltage-frequency conversion ADC

Voltage-frequency conversion ADC is an indirect ADC. It first converts the voltage of the input analog signal into a pulse signal with a frequency proportional to it, and then counts this pulse signal within a fixed time interval. The counting result is a digital quantity proportional to the input analog voltage signal. Theoretically, the resolution of this ADC can be increased indefinitely, as long as the width of the accumulated pulse number that meets the output frequency resolution requirement is used.

Advantages: High accuracy, low price, and low power consumption.

Disadvantages: Similar to the integral ADC, its conversion rate is limited to 100 to 300 SPS for 12 bits.

5. ∑-Δ ADC

∑-Δ converter is also called oversampling converter. It uses incremental encoding, that is, quantization encoding is performed according to the difference between the previous value and the next value. ∑-Δ ADC includes analog ∑-Δ modulator and digital decimation filter. ∑-Δ modulator mainly completes signal sampling and incremental coding. It provides incremental coding, i.e. ∑-Δ code, to the digital decimation filter. The digital decimation filter completes the decimation filtering of ∑-Δ code and converts the incremental coding into a high-resolution linear pulse code modulated digital signal. Therefore, the decimation filter is actually equivalent to a code converter.

Advantages: high resolution, up to 24 bits; high conversion rate, higher than integral type and voltage-frequency conversion type ADC; low price; internal use of high frequency oversampling technology to achieve digital filtering, reducing the requirements for filtering sensor signals.

Disadvantages: high-speed ∑-Δ ADC is expensive; under the same conversion rate, the power consumption is higher than that of integral type and successive approximation type ADC.

6. Pipeline ADC

Pipeline structure ADC, also known as sub-area ADC, is an efficient and powerful analog-to-digital converter. It can provide high-speed, high-resolution analog-to-digital conversion, and has satisfactory low power consumption and small chip size; after reasonable design, it can also provide excellent dynamic characteristics.

The pipeline ADC consists of several cascaded circuits, each of which includes a sample/hold amplifier, a low-resolution ADC and DAC, and a summing circuit, where the summing circuit also includes an inter-stage amplifier that can provide gain. The fast and accurate n-bit converter is divided into two or more sub-areas (pipeline) to complete. After the sample/hold of the first stage circuit samples the input signal, an m-bit resolution coarse A/D converter first quantizes the input, and then a product-type digital-to-analog converter (MDAC) with at least n-bit accuracy generates an analog/analog level corresponding to the quantization result and sends it to the summing circuit, which deducts this analog level from the input signal. The difference is accurately amplified by a fixed gain and then handed over to the next stage circuit for processing. After such processing at each stage, the residual signal is finally converted by a higher-precision K-bit fine A/D converter. The outputs of the above-mentioned coarse and fine A/Ds are combined to form a high-precision n-bit output.

Advantages: good linearity and low offset; multiple samples can be processed simultaneously, with high signal processing speed, typically Tconv