eGaN FET vs. Silicon Power Devices Part 6: Isolated PoE-PSE Converters

Isolated brick converters are widely used in telecommunications systems to power network equipment and are available in a variety of standard form factors and input/output voltage ranges. Their modularity, power density, reliability, and versatility have simplified isolated power applications and, to some extent, commoditized the isolated power market. A common feature of these converters is that the input/output power device ratings are all 100V or less. However, isolated converter applications on the market require higher device voltages, such as PoE-PSE (Power over Ethernet Power Sourcing Equipment). These converters can benefit more from the increased voltage ratings of gallium nitride field effect transistors (eGaN FETs). This article will build a half-brick converter based on eGaN FETs and compare it to a similar state-of-the-art silicon MOSFET brick converter.
 
Introduction to Isolated PoE-PSE Converters

Over the past few years, standards for Power over Ethernet (PoE) have been gradually formed. The main focus has been on the systematic increase in power in new classes and types of devices. According to the IEEE 802.3at standard for Power over Ethernet, power sourcing equipment (PSE) requires output voltages between 44V and 57V for PoE Type 1 and 50V and 57V for PoE Type 2 (PoE+). Each port of an Ethernet switch must be able to output 15.4W (Type 1) or 25.5W (Type 2). The output requires some form of regulation for the PSE, but strict regulation is not required. Interestingly, the increase in the minimum voltage is due to the increase in the maximum linear voltage drop due to the increase in power levels, and in the future PSEs may require a smaller voltage range closer to the maximum value of 57V. For a typical Ethernet switch with 24, 36 or 48 ports, the total PSE power required may be as high as 1.2kW. This drives the need for converters with higher efficiency and higher power density.

Because of the size constraints imposed on these brick converters, engineers are continually trying to find innovative ways to increase their output power and power density. While these ideas are many and varied, they are all related to improving system efficiency. This is a physical limitation due to the fixed size of the converter and the method of heat dissipation. For a half-brick converter, it is difficult to remove losses beyond 35W, even with strong airflow and/or substrate. Figure 1 shows the relationship between the minimum full-load efficiency required for a half-brick converter and the achievable output power. Because most commercially available half-brick PSE converters are already 95% efficient, even a half-percentage-point improvement in efficiency is significant and can increase output power by approximately 100W. However, cost per watt ($/W) is the most important consideration, and improving brick converter efficiency and output power can reduce the total cost per watt of the module.

Figure 1: Minimum efficiency required for a half-brick converter to achieve a specified output power (assuming maximum power dissipation of 35W).

Comparing Different Isolated PoE-PSE Converters

When trying to compare half-brick PoE-PSE converters, a simple one-to-one comparison is not possible due to the wide variety of designs available from commercially available converters. The output power of each generation of power supplies has increased as manufacturers’ “optimal” designs have improved in terms of construction, layout, and topology. Determining the “best” solution is an iterative process, and the definition of “best” solution varies, further complicating the issue. A great example of the variety of designs available for half-brick applications is the choice between building two interleaved converters or a single converter. Additionally, current commercial products use either a single-stage conversion or a two-stage conversion approach.

For larger brick sizes (such as half-brick), the output power and total power dissipation of the converter are high enough that multiple power devices are usually required per switch - both from the perspective of required thermal management and from the perspective of minimum on-resistance (maximum die size). If the converter is split into two (each responsible for half the power), the total number of power devices will not be affected. The cost and volume increase of using more inductors and transformers is also problematic because these devices are smaller and interleaving the converters allows the output capacitance to be reduced. In addition, the size of the brick (especially the height limit) means that the height of a single large power transformer is limited and the length of its core channel may not be optimal compared to the cores of two smaller transformers. The remaining differences (gate drive and control) will likely become the decisive factors, that is, can we accept the increased cost to achieve higher efficiency and output power?

Just like the eighth-brick converter, developing an eGaN FET-based converter is not necessarily a general optimal solution. Our design goal is to operate at a much higher frequency than current commercial systems to demonstrate that eGaN devices can help engineers skilled in power supply design to develop state-of-the-art next-generation products with higher efficiency and higher output power.

Prototype eGaN FET-based PSE converter

For a 48V to 53V half-brick eGaN FET-based PSE converter, a phase-shifted full-bridge (PSFB) converter using a full-bridge synchronous rectifier (FBSR) topology is the choice (see Figure 2). Due to the higher power, two interleaved converters are built in the half-brick footprint, rather than a single converter with parallel devices. This not only avoids the complexity of paralleling devices, but the use of two independent converters theoretically allows for improved efficiency at light loads by shedding phases. Figure 3 shows the efficiency results for one-phase and two-phase operation, with at least a 2% improvement in light load efficiency using simple phase shedding.

Each converter operates at 250kHz and has an output ripple frequency of 1MHz. A more complete schematic is shown in Figure 4. The purpose is to show that two such converters can be built in a limited volume due to the increased switching frequency and the relatively small size of the GaN devices. Choosing a transformer turns ratio of 4:7 means that when VIN is 60V, the secondary winding voltage (excluding switching spikes) is approximately 105V, so 200V devices can be used on the secondary side and 100V devices on the primary side.

An actual prototype based on eGaN FETs is shown in Figure 5. As can be seen, unlike conventional brick designs, the magnetic components are not integrated on the main PCB, but are placed on several separate PCBs. This not only reduces the number of layers required on the main PCB, but also allows the output filter to use conventional surface mount inductors. The converter uses an eight-layer, two-ounce copper PCB. The transformer winding is created by stacking two eight-layer boards (in parallel) at the winding window.

Figure 2: A 350W fully regulated phase-shifted full-bridge (PSFB) topology using eGaN FETs to implement full-bridge synchronous rectification (FBSR) (two half-brick, interleaved 250kHz converters).

Figure 3: Efficiency data for a half-brick PSE converter using an eGaN FET-based prototype design in single-phase (half the converter powered off) and normal two-phase operation.

Figure 4: Schematic of an eighth-brick, 38 V to 60 V to 53 V/70 W converter designed with eGaN FETs and operating at a switching frequency of 250 kHz.

Figure 5: Top and bottom views of a 48V to 53V half-brick PSE converter designed with eGaN FETs (units in inches).

Comparison of PSE Converters

The half-brick PSE converter designed with eGaN FETs can be compared with similar fully regulated commercial half-brick converters ranging from 48V to (approximately) 53V. As mentioned earlier, these commercial converters cover a wide range of topologies and configurations as listed in Table 1. To highlight how the eGaN FET-based prototype compares to these converters, two products (Converters B and D in Table 1) have been selected to show the full results.

Table 1: Comparison of commercially available half-brick PSE converters.

The D converter is a conventional single-stage, single-transformer single converter with a similar topology to the prototype (although the eGaN FET prototype contains two parallel converters). The efficiency comparisons shown in Figures 6 and 7 show that light load efficiency benefits can be achieved using lower switching frequencies, and that light load optimization is possible through careful design of core losses and leakage inductance. In contrast, the core of the eGaN FET converter is designed only to achieve minimal leakage inductance and prudent switching at a 75% higher switching frequency. Thus, although the efficiency is lower at light load, at about 50% load, the eGaN FET prototype will ultimately produce 25% more power with similar total converter losses and full load conditions (see Figure 6 for loss comparison).

The second commercial half-brick converter (Converter B) used for comparison uses a two-stage solution. Although the two-stage solution is different from the prototype solution, both distribute the output power to two independent converters operating in parallel. The advantage of the two-stage solution is that it supports the efficiency optimization of the unregulated isolation stage converter because it operates at a fixed duty cycle and voltage, independent of the converter input voltage. At the same time, this controlled input/output voltage allows the use of lower rated voltage devices with better quality factors. The disadvantage is the additional conduction losses caused by the two-stage circuit, as well as the increase in complexity and number of components.

The efficiency comparison between the eGaN FET prototype and the two-stage converter is shown in Figure 8. It shows the process of product optimization, as the peak efficiency is achieved at a nominal 48V input. The difference between the topologies can be illustrated by comparing the results for a 38V (low line) input voltage: due to the boost regulation circuit used in the two-stage converter, the low line voltage is actually the worst case (increased conduction losses and no significant reduction in switching losses), while for the traditional single-stage solution, the low line is the best case as it minimizes switching losses.

The two-stage converter dissipates almost 50W at low line (almost twice that of the eGaN FET converter under the same conditions) (see Figure 9), while at 75V (high line) input losses are 15% higher than the eGaN FET-based converter at an operating voltage 25% higher.

Figure 6: Efficiency comparison of the eGaN FET prototype half-brick PSE converter and the D converter (commercial MOSFET solution) half-brick PSE converter.

Figure 7: Power consumption comparison of the eGaN FET prototype and D-converter half-brick PSE converter.

Figure 8: Efficiency comparison of the eGaN FET prototype and the B-converter half-brick PSE converter.

Figure 9: Power consumption comparison of the eGaN FET prototype and the B converter half-brick PSE converter.

Conclusion

This chapter compares a fully regulated half-brick PSU converter using an eGaN FET prototype with a similar MOSFET converter. The eGaN FET prototype can operate at a switching frequency approximately twice as high as that of a comparable state-of-the-art commercial converter, achieving full performance. Output power can be 100W higher than the closest commercial converter.

It is important to note that in brick converter design, topology selection and device optimization are just as important as selecting the best power device. Any engineer skilled in these processes should be able to further improve the performance of the eGaN FET prototype discussed in this article.

References

[1] Johan Strydom, Andrew Ferencz, “eGaN FET-Silicon Power Shootout Vol. 4: Brick Converters” Power Electronics Technology, July 2011, http://powerelectronics.com/discrete-semis/silicon-power-shootout-brick- converters-0711/

[2] IEEE 802.3atTM-2009 ethernet standard, http://standards.ieee.org/about/get/802/802.3.html

[3] Micahel de Rooij, Johan Strydom, “eGaN FET-Silicon Power Shootout Vol. 5: Paralleling eGaN FETs – part 1” http://powerelectronics.com/power_semiconductors/gan_transistors/paralleling-egain-fets-part1-0911/ index.html