Solutions to the problem of insufficient IC drive current in power supply design

　　In power supply design, engineers often face the problem of insufficient control IC drive current, or the problem of excessive control IC power consumption due to gate drive loss. To alleviate this problem, engineers often use external drivers. Semiconductor manufacturers (including TI) have ready-made MOSFET integrated circuit driver solutions, but this is not usually the lowest cost solution. Discrete devices worth a few cents are usually chosen.

　　Simple buffers can drive currents above 2Amps, and the higher current driver of the FMMT618 can enhance the drive capability.

Figure 1

　　The schematic in Figure 1 shows an NPN/PNP emitter-follower pair that can be used to buffer the output of a control IC. This can increase the drive capability of the controller and shift the drive losses to external components. Many people would argue that this particular circuit does not provide enough drive current.

　　As shown in the hf curve in Figure 2, manufacturers typically do not provide currents higher than 0.5A for these low current devices. However, this circuit can provide current drive much higher than 0.5A, as shown in the waveform in Figure 1. For this waveform, the buffer is driven by a 50Ω source and the load is a 0.01 uF capacitor in series with a 1Ω resistor. The trace shows the voltage across the 1Ω resistor, so the current on each terminal is 2A. The figure also shows that the MMBT2222A can source about 3A and the MMBT3906 sinks 2A.

　　In reality, the transistors will be paired with their components (MMBT3904 for 3906 and MMBT2907 for 2222). These two different pairs are only for comparison. These devices also have higher currents and higher hfe, such as the FMMT618/718 pair, which has an hfe of 100 at 6A (see Figure 2). Unlike integrated drivers, discrete devices are a lower cost solution with higher thermal and current performance.

　　Figure 2: Higher current drivers such as the FMMT618 can enhance drive capability -

　　Figure 3 shows a simple buffer variant that allows you to cross the isolation boundary. A signal level transformer is driven by a symmetrical bipolar drive signal. The transformer secondary winding is used to generate the buffer power and provide the input signal to the buffer. Diodes D1 and D2 regulate the voltage from the transformer, while transistors Q1 and Q2 are used to buffer the transformer output impedance to provide large current pulses to charge and discharge the FET connected to the output. This circuit is very efficient with a 50% duty cycle input (see the lower drive signal in Figure 3) because it will drive the FET gate negative and provide fast switching, minimizing switching losses. This is ideal for phase-shifted full-bridge converters.

　　If you plan to use an upper drive waveform less than 50% (see Figure 3), then use a snubber transformer. Doing so helps avoid arbitrary turn-on EFT due to transition ringing. A low-to-zero transition can cause leakage inductance and secondary capacitance to cause ringing and generate a positive voltage outside the transformer.

　　Figure 3: You can build a standalone drive using just a few components

　　In summary, discrete devices can help you save money. A discrete device worth about $0.04 can reduce the cost of a driver IC by 10 times. A discrete driver can provide more than 2A of current and allow you to draw power from the control IC. In addition, the device removes the high switching currents from the control IC, thereby improving regulation and noise performance.

　　Let's take a look at self-driven synchronous rectifiers and explore when a discrete driver is needed to protect the synchronous rectifier gate from excessive voltage. Ideally, you would drive the synchronous rectifier directly from the power transformer, but due to wide input voltage variations, the transformer voltage can become so high that it could damage the synchronous rectifier.

　　Figure 4 shows discrete components used to control the conduction of Q2 in a synchronous flyback topology. This circuit allows you to control the turn-on gate current and protect the rectifier gate from high reverse voltage damage. The circuit can be driven with a negative voltage at the transformer output. The 12V input is very negative compared to the 5V output, causing Q1 to conduct and short the gate-source voltage on the power FET Q2, quickly turning it off. Since the base current flows through R2, there is a negative voltage across the speed-up capacitor C1. During this time, the primary FET will conduct and store energy in the transformer magnetizing inductance. When the primary FET is off, the transformer output voltage swings in the positive voltage range. The gate-source of Q2 is quickly forward biased through D1 and R1. D2 protects the base-emitter connection of Q1 while C1 discharges. The circuit remains in this state until the primary FET is turned on again. Just like a synchronous buck converter, the output current actually discharges the output capacitor. Turning on the primary FET decays the voltage on the secondary side of the transformer and removes the positive drive for Q2. This transition results in significant shoot-through combined with the primary FET and Q2 conduction times. To minimize this, Q1 will short the gate-to-source across the synchronous rectifier as quickly as possible when both the primary and secondary FETs are on.

　　Figure 4: Q1 turns off quickly and synchronizes the reverse direction -

　　Figure 5 shows the discrete drivers used to control the conduction of Q1 and Q4 in a synchronous forward converter. In this particular design, the input voltage is wide. This means that the gates of the two FETs may have voltages exceeding their rated voltages, so a clamping circuit is required. When the transformer output voltage is negative, the circuit turns on Q4. Diodes D2 and D4 limit the positive drive voltage to about 4.5V. D1 and D3 turn off the FET, which is driven by the current in the transformer and inductor. Q1 and Q4 clamp the reverse gate voltage to ground. In this design, the FETs have relatively small gate inductance, so the switching is very fast. Larger FETs may require the implementation of a PNP transistor to decouple the gate capacitance from the transformer winding and increase the switching speed. Selecting the right package for the gate drive converters Q2 and Q3 is critical because these packages dissipate a lot of power in the converter (this is because they act as linear regulators during the discharge of the FET gate capacitance). In addition, the power dissipation in R1 and R2 may also be high due to the higher output voltage.

　　Figure 5: D2 and D4 limit the positive gate voltage in this synchronous forward driver.

　　In summary, many power supplies with synchronous rectifiers can use the transformer winding voltage to drive the gate of the synchronous rectifier. Wide input range or high output voltage requires regulation circuits to protect the gate. In the synchronous flyback structure shown in Figure 4, we showed you how to control the reverse voltage on the synchronous rectifier gate while maintaining fast switching transitions. Similarly, in the synchronous forward structure of Figure 2, we showed you how to limit the positive drive voltage on the synchronous rectifier gate.