Power Supply Design Basics: PCB Design Tips 40 FAQs

1. How to choose PCB board?

The selection of PCB materials must strike a balance between meeting design requirements and mass production and cost. Design requirements include electrical and mechanical parts. Usually, this material issue is more important when designing very high-speed PCB boards (frequencies greater than GHz). For example, the dielectric loss of the commonly used FR-4 material at frequencies of several GHz will have a great impact on signal attenuation and may not be suitable. In terms of electrical, it is necessary to pay attention to whether the dielectric constant and dielectric loss are suitable for the designed frequency.

2. How to avoid high-frequency interference?

The basic idea to avoid high-frequency interference is to minimize the interference of the electromagnetic field of high-frequency signals, which is also called crosstalk. This can be done by increasing the distance between high-speed signals and analog signals, or adding ground guard/shunt traces next to analog signals. Also pay attention to the noise interference of digital ground on analog ground.

3. How to solve the signal integrity problem in high-speed design?

Signal integrity is basically an impedance matching problem. Factors that affect impedance matching include the architecture and output impedance of the signal source, the characteristic impedance of the trace, the characteristics of the load end, and the topology of the trace. The solution is to rely on termination and adjust the topology of the trace.

4. How is the differential wiring method implemented?

There are two points to note when routing differential pairs. One is that the lengths of the two lines should be as equal as possible, and the other is that the spacing between the two lines (this spacing is determined by the differential impedance) should remain constant, that is, they should remain parallel. There are two ways to do this: one is for the two lines to run on the same routing layer (side-by-side), and the other is for the two lines to run on two adjacent layers (over-under). Generally, the former side-by-side is more commonly used.

5. For a clock signal line with only one output terminal, how to achieve differential wiring?

Differential wiring is only meaningful when both the signal source and the receiving end are differential signals. Therefore, differential wiring cannot be used for clock signals with only one output end.

6. Can a matching resistor be added between the differential line pairs at the receiving end?

Matching resistors are usually added between differential line pairs at the receiving end, and their values ​​should be equal to the value of differential impedance. This will improve signal quality.

7. Why should the routing of differential pairs be close and parallel?

The routing of differential pairs should be appropriately close and parallel. The so-called appropriate closeness is because this spacing affects the value of differential impedance, which is an important parameter in the design of differential pairs. Parallelism is also required to maintain the consistency of differential impedance. If the two lines are far away or close, the differential impedance will be inconsistent, which will affect signal integrity and timing delay.

8. How to deal with some theoretical conflicts in actual wiring

1. Basically, it is right to separate the analog and digital grounds. It should be noted that the signal routing should not cross the split point (moat) as much as possible, and the returning current path of the power supply and signal should not be too large.

2. The crystal oscillator is an analog positive feedback oscillation circuit. To have a stable oscillation signal, the loop gain and phase specifications must be met. However, the oscillation specifications of this analog signal are easily interfered with. Even adding ground guard traces may not completely isolate the interference. Moreover, if it is too far away, the noise on the ground plane will also affect the positive feedback oscillation circuit. Therefore, the distance between the crystal oscillator and the chip must be as close as possible.

3. It is true that there are many conflicts between high-speed wiring and EMI requirements. But the basic principle is that the resistors, capacitors or ferrite beads added due to EMI cannot cause some electrical characteristics of the signal to be non-compliant with the specifications. Therefore, it is best to first use the techniques of arranging routing and PCB stacking to solve or reduce EMI problems, such as routing high-speed signals on the inner layer. Finally, use resistors, capacitors or ferrite beads to reduce damage to the signal.

9. How to resolve the contradiction between manual routing and automatic routing of high-speed signals?

Most of the current powerful wiring software's automatic routers have set constraints to control the routing method and the number of vias. The capabilities of the wiring engines and the setting items of the constraints of each EDA company are sometimes very different. For example, whether there are enough constraints to control the winding method of the serpentine, whether the routing spacing of the differential pair can be controlled, etc. This will affect whether the routing method generated by the automatic routing can meet the designer's ideas. In addition, the difficulty of manually adjusting the routing is also absolutely related to the capabilities of the wiring engine. For example, the pushing ability of the routing, the pushing ability of the vias, and even the pushing ability of the routing to the copper plating, etc. Therefore, choosing a router with a strong wiring engine capability is the solution.

10. About test coupon.

The test coupon is used to measure the characteristic impedance of the produced PCB board with TDR (Time Domain Reflectometer) to see if it meets the design requirements. Generally, there are two types of impedance to be controlled: single line and differential pair. Therefore, the trace width and line spacing (when there is a differential pair) on the test coupon should be the same as the line to be controlled. The most important thing is the location of the ground point during measurement. In order to reduce the inductance of the ground lead, the grounding point of the TDR probe is usually very close to the probe tip where the signal is measured. Therefore, the distance and method between the point where the signal is measured on the test coupon and the grounding point should be consistent with the probe used.

11. In high-speed PCB design, the blank area of ​​the signal layer can be copper-clad, but how should the copper-clad areas of multiple signal layers be allocated for grounding and power supply?

Generally speaking, copper in the blank area is used for grounding in most cases. However, when copper is applied next to high-speed signal lines, attention should be paid to the distance between the copper and the signal line, because the copper applied will reduce the characteristic impedance of the trace. Also, care should be taken not to affect the characteristic impedance of other layers, such as in the dual stripline structure.

12. Can the characteristic impedance of the signal line on the power plane be calculated using the microstrip line model? Can the signal between the power supply and ground plane be calculated using the stripline model?

Yes, both the power plane and the ground plane must be considered as reference planes when calculating characteristic impedance. For example, a four-layer board: top layer-power layer-ground layer-bottom layer, the top layer trace characteristic impedance model is a microstrip line model with the power plane as the reference plane.

13. Can the automatic generation of test points by software on high-density printed circuit boards generally meet the test requirements of mass production?

Generally, whether the test points automatically generated by the software meet the test requirements depends on whether the specifications for adding test points meet the requirements of the test equipment. In addition, if the routing is too dense and the specifications for adding test points are strict, it may not be possible to automatically add test points to each line. Of course, you need to manually fill in the places to be tested.

14. Will adding test points affect the quality of high-speed signals?

Whether it will affect the signal quality depends on the method of adding test points and how fast the signal is. Basically, the additional test points (not using the existing vias (via or DIP pins) on the line as test points) may be added to the line or a short line may be pulled out from the line. The former is equivalent to adding a very small capacitor on the line, and the latter is an additional branch. Both of these situations will have some impact on high-speed signals, and the extent of the impact is related to the frequency speed of the signal and the edge rate of the signal. The size of the impact can be known through simulation. In principle, the smaller the test point, the better (of course, it must meet the requirements of the test equipment) and the shorter the branch, the better.

15. If several PCBs form a system, how should the ground wires between the boards be connected?

When the signals or power supplies between the interconnected PCB boards are in operation, for example, when board A sends power or signals to board B, there will be an equal amount of current flowing back from the ground layer to board A (this is Kirchoff current law). The current on the ground layer will find the place with the smallest impedance to flow back. Therefore, at each interface where power or signals are connected to each other, the number of pins allocated to the ground layer cannot be too small to reduce impedance, which can reduce the noise on the ground layer. In addition, the entire current loop can also be analyzed, especially the part with larger current, and the connection method of the ground layer or ground wire can be adjusted to control the flow of current (for example, create low impedance at a certain place to let most of the current flow from this place) to reduce the impact on other more sensitive signals.

16. Can you introduce some foreign technical books and materials on high-speed PCB design?

The application of high-speed digital circuits now includes communication networks and computer-related fields. In the field of communication networks, the operating frequency of PCB boards has reached around GHz, and the number of layers is as high as 40 as far as I know. Computer-related applications have also achieved the highest operating frequency of 400MHz (such as Rambus) for general PCs and servers due to the advancement of chips. In response to the demand for high-speed and high-density routing, the demand for blind/buried vias, mircrovias and build-up process technology is gradually increasing. These design requirements can be mass-produced by manufacturers.

17. Two commonly referenced characteristic impedance formulas:

a. Microstrip Z = {87/[sqrt(Er+1.41)]}ln[5.98H/(0.8W+T)] Where W is the line width, T is the copper thickness of the trace, H is the distance from the trace to the reference plane, and Er is the dielectric constant of the PCB material. This formula can only be applied when 0.1<(W/H)<2.0 and 1<(Er)<15.

b. Stripline Z = [60/sqrt(Er)]ln{4H/[0.67π(T+0.8W)]} Where H is the distance between the two reference planes, and the trace is located in the middle of the two reference planes. This formula can only be applied when W/H<0.35 and T/H<0.25.

18. Can a ground wire be added in the middle of the differential signal line?

Generally, a ground wire cannot be added in the middle of a differential signal. This is because the most important point in the application principle of differential signals is to utilize the benefits brought by the mutual coupling between differential signals, such as flux cancellation and noise immunity. If a ground wire is added in the middle, the coupling effect will be destroyed.

19. Does the design of rigid-flexible boards require special design software and specifications? Where can I get this type of circuit board processing in China?

You can use the software for designing PCB to design Flexible Printed Circuit. You can also use Gerber format to produce FPC manufacturers. Because the manufacturing process is different from that of general PCB, each manufacturer will have its own restrictions on the minimum line width, minimum line spacing, and minimum aperture (via) according to their manufacturing capabilities. In addition, you can lay some copper foil at the turning point of the flexible circuit board for reinforcement. As for the manufacturer, you can search "FPC" as a keyword on the Internet and you should be able to find it.

20. What is the principle for properly selecting the grounding point between the PCB and the housing?

The principle of selecting the grounding point between the PCB and the chassis is to use the chassis ground to provide a low impedance path for the returning current and to control the path of this returning current. For example, usually near high-frequency devices or clock generators, the PCB ground layer can be connected to the chassis ground by fixing screws to minimize the entire current loop area, thereby reducing electromagnetic radiation.

21. Which aspects should be considered when debugging a circuit board?

For digital circuits, first determine three things in order:

1. Confirm that all power supply values ​​meet the design requirements. Some systems with multiple power supplies may require certain specifications for the order and speed of starting up certain power supplies.

2. Verify that all clock signal frequencies are working properly and there are no non-monotonic issues on the signal edges.

3. Check whether the reset signal meets the specification requirements.

If all is normal, the chip should send out the first cycle signal. Next, debug according to the system operation principle and bus protocol.

22. If the size of the circuit board is fixed, and the design needs to accommodate more functions, it is often necessary to increase the routing density of the PCB. However, this may lead to increased mutual interference between the routings, and the impedance cannot be reduced if the routing is too thin. Could experts please introduce some techniques for high-speed (>100MHz) high-density PCB design?

When designing high-speed and high-density PCBs, crosstalk interference is something that needs special attention, because it has a significant impact on timing and signal integrity. Here are a few things to note:

1. Control the continuity and matching of the characteristic impedance of the trace.

2. The size of the trace spacing. The spacing commonly seen is twice the line width. Through simulation, we can understand the impact of trace spacing on timing and signal integrity and find the minimum tolerable spacing. The results of different chip signals may be different.

3. Select the appropriate termination method.

4. Avoid having the same routing direction for the upper and lower adjacent layers, or even having the routing lines overlap each other, because this kind of crosstalk is greater than that of adjacent routing lines on the same layer.

5. Use blind/buried vias to increase the trace area. However, the production cost of the PCB board will increase. It is indeed difficult to achieve complete parallelism and equal length in actual implementation, but it should be done as much as possible. In addition, differential termination and common mode termination can be reserved to mitigate the impact on timing and signal integrity.

23. LC circuits are often used for filtering analog power supplies. But why is LC sometimes less effective than RC filtering?

The comparison of LC and RC filtering effects must consider the frequency band to be filtered and whether the inductance value is appropriate. This is because the reactance of the inductor is related to the inductance value and frequency. If the noise frequency of the power supply is low and the inductance value is not large enough, the filtering effect may not be as good as RC. However, the price to pay for using RC filtering is that the resistor itself consumes energy and has poor efficiency, and attention should be paid to the power that the selected resistor can withstand.

24. What is the method for selecting inductor and capacitor values ​​for filtering?

In addition to considering the noise frequency that you want to filter out, the selection of inductance value also needs to consider the response capability of instantaneous current. If the output end of LC has the opportunity to output a large current instantly, a large inductance value will hinder the speed at which this large current flows through this inductor, increasing ripple noise. The capacitance value is related to the size of the ripple noise specification value that can be tolerated. The smaller the ripple noise value requirement, the larger the capacitance value will be. The ESR/ESL of the capacitor will also have an impact. In addition, if this LC is placed at the output end of a switching regulation power supply, it is also necessary to pay attention to the impact of the pole/zero generated by this LC on the stability of the negative feedback control loop.

25. How to meet EMC requirements as much as possible without causing too much cost pressure?

The increased cost on PCB boards due to EMC is usually due to the increase in the number of ground layers to enhance the shielding effect and the addition of ferrite beads, chokes and other high-frequency harmonic suppression devices. In addition, it is usually necessary to match the shielding structure of other mechanisms to make the entire system pass the EMC requirements. The following only provides a few PCB design techniques to reduce the electromagnetic radiation effect generated by the circuit.

1. Use devices with slower signal slew rate as much as possible to reduce the high-frequency components generated by the signal. 2. Pay attention to the placement of high-frequency devices and do not place them too close to external connectors.

3. Pay attention to the impedance matching of high-speed signals, routing layers and their return current paths to reduce high-frequency reflections and radiation.

4. Place enough and appropriate decoupling capacitors at the power pins of each device to mitigate the noise on the power layer and ground layer. Pay special attention to whether the frequency response and temperature characteristics of the capacitors meet the design requirements.

5. The ground near the external connector can be properly separated from the ground layer, and the ground of the connector can be connected to the chassis ground as close as possible.

6. Ground guard/shunt traces can be used appropriately next to some particularly high-speed signals, but attention should be paid to the impact of guard/shunt traces on the characteristic impedance of the trace.

7. The power layer is 20H smaller than the ground layer, where H is the distance between the power layer and the ground layer.

26. When there are multiple digital/analog functional blocks on a PCB board, the conventional practice is to separate the digital/analog ground. Why?

The reason for separating the digital and analog grounds is that when the digital circuit switches between high and low potentials, it will generate noise on the power supply and ground. The magnitude of the noise is related to the speed of the signal and the magnitude of the current. If the ground plane is not divided and the noise generated by the digital area circuit is large and the analog area circuit is very close, then even if the digital and analog signals do not cross, the analog signal will still be interfered by the ground noise. In other words, the method of not dividing the digital and analog grounds can only be used when the analog circuit area is far away from the digital circuit area that generates large noise.

27. Another approach is to ensure that the digital/analog layout is separated and the digital/analog signal lines do not cross each other, and the entire PCB board ground is not divided, and the digital/analog ground is connected to this ground plane. What is the reason?

The requirement that digital and analog signal lines cannot cross each other is because the return current path of a slightly faster digital signal will try to flow back to the source of the digital signal along the ground near the bottom of the line. If the digital and analog signal lines cross each other, the noise generated by the return current will appear in the analog circuit area.

28. How to consider impedance matching when designing high-speed PCB schematics?

When designing high-speed PCB circuits, impedance matching is one of the design elements. The impedance value is absolutely related to the routing method, such as whether it is on the surface (microstrip) or the inner layer (stripline/double stripline), the distance from the reference layer (power layer or ground layer), the routing width, the PCB material, etc., all of which will affect the characteristic impedance value of the routing. In other words, the impedance value can only be determined after routing. General simulation software cannot take into account some impedance discontinuous routing situations due to the limitations of the line model or the mathematical algorithm used. At this time, only some terminators (terminations), such as series resistors, can be reserved on the schematic diagram to mitigate the effect of routing impedance discontinuity. The real fundamental solution to the problem is to try to avoid impedance discontinuity when routing.

29. Where can I find a more accurate IBIS model library?

The accuracy of the IBIS model directly affects the simulation results. Basically, IBIS can be regarded as the electrical characteristic data of the actual chip I/O buffer equivalent circuit, which can generally be converted from the SPICE model (it can also be measured, but there are more restrictions). The SPICE data is absolutely related to chip manufacturing, so the same device provided by different chip manufacturers has different SPICE data, and the data in the converted IBIS model will also vary accordingly. In other words, if the device of manufacturer A is used, only they have the ability to provide accurate model data of their device, because no one else knows better than them what process their device is made of. If the IBIS provided by the manufacturer is inaccurate, the only fundamental solution is to constantly ask the manufacturer to improve it.

30. When designing high-speed PCB, what aspects should designers consider regarding EMC and EMI rules?

Generally, EMI/EMC design needs to consider both radiated and conducted aspects. The former belongs to the higher frequency part (>30MHz) and the latter belongs to the lower frequency part (<30MHz). Therefore, we cannot only pay attention to the high frequency and ignore the low frequency part.

A good EMI/EMC design must consider the location of the device, the arrangement of PCB stacking, the routing of important connections, the selection of devices, etc. at the beginning of the layout. If these are not arranged better in advance, solving them afterwards will be counterproductive and increase costs. For example, the location of the clock generator should not be close to the external connector as much as possible, high-speed signals should be routed on the inner layer as much as possible and attention should be paid to characteristic impedance matching and continuity of the reference layer to reduce reflections, the slew rate of the signal pushed by the device should be as small as possible to reduce high-frequency components, and when selecting decoupling (decoupling/bypass) capacitors, pay attention to whether their frequency response meets the requirements to reduce power layer noise. In addition, pay attention to the return path of the high-frequency signal current to make its loop area as small as possible (that is, the loop impedance is as small as possible) to reduce radiation. The range of high-frequency noise can also be controlled by splitting the ground layer. Finally, the grounding point (chassis ground) of the PCB and the casing should be appropriately selected.

31. How to choose EDA tools?

Thermal analysis is not a strong point in current PCB design software, so it is not recommended. For other functions 1.3.4, PADS or Cadence can be selected, both of which have good performance and price ratio. Beginners in PLD design can use the integrated environment provided by PLD chip manufacturers, and single-point tools can be used when designing more than one million gates.

32. Please recommend an EDA software suitable for high-speed signal processing and transmission.

For conventional circuit design, INNOVEDA's PADS is very good, and it has matching simulation software, and this type of design often accounts for 70% of the application occasions. When doing high-speed circuit design, analog and digital mixed circuits, the Cadence solution should be a software with better performance and price. Of course, Mentor's performance is still very good, especially its design process management should be the best.

33. Explanation of the meaning of each layer of PCB board

Topoverlay ---- the name of the top-layer device, also called top silkscreen or top component legend, such as R1 C5, IC10.bottomoverlay----similarly, multilayer-----if you design a 4-layer board, you place a free pad or via, define it as multilay, then its pad will automatically appear on the 4 layers. If you only define it as the top layer, then its pad will only appear on the top layer.

34. What should be paid attention to in the design, routing and layout of high-frequency PCB above 2G?

High-frequency PCBs above 2G belong to RF circuit design and are not within the scope of high-speed digital circuit design. The layout and routing of RF circuits should be considered together with the schematic diagram, because layout and routing will cause distribution effects. In addition, some passive components in RF circuit design are defined by parameters and implemented with special-shaped copper foils, so EDA tools are required to provide parameterized components and edit special-shaped copper foils. Mentor's boardstation has a special RF design module that can meet these requirements. In addition, general RF design requires a special RF circuit analysis tool. The most famous one in the industry is Agilent's EESoft, which has a good interface with Mentor's tools.

35. What rules should be followed in the design of microstrip for high-frequency PCB design above 2G?

RF microstrip line design requires the use of a 3D field analysis tool to extract transmission line parameters. All rules should be specified in this field extraction tool.

36. For a fully digital signal PCB, there is an 80MHz clock source on the board. In addition to using silk screen (grounding), what kind of circuit should be used for protection in order to ensure sufficient driving capability?

To ensure the driving capability of the clock, it should not be achieved through protection, but generally a clock driver chip is used. Generally, the concern about the clock driving capability is caused by multiple clock loads. A clock driver chip is used to turn one clock signal into several, using a point-to-point connection. When selecting a driver chip, in addition to ensuring that it is basically matched with the load and the signal edge meets the requirements (generally the clock is an edge-valid signal), the clock delay in the driver chip must be taken into account when calculating the system timing.

37. If a separate clock signal board is used, what kind of interface is generally used to ensure that the transmission of the clock signal is less affected?

The shorter the clock signal, the smaller the transmission line effect. Using a separate clock signal board will increase the signal wiring length. And the grounding and power supply of the single board are also a problem. If you want to transmit over long distances, it is recommended to use differential signals. LVDS signals can meet the driving capability requirements, but if your clock is not too fast, it is not necessary.

38. 27M, SDRAM clock line (80M-90M), the second and third harmonics of these clock lines are just in the VHF band, and the high frequency interference from the receiving end is very large. In addition to shortening the line length, what other good methods are there?

If the third harmonic is large and the second harmonic is small, it may be because the signal duty cycle is 50%, because in this case, the signal has no even harmonics. At this time, the signal duty cycle needs to be modified. In addition, for unidirectional clock signals, source-end series matching is generally used. This can suppress secondary reflections but will not affect the clock edge rate. The source-end matching value can be obtained using the formula in the figure below.

39. What is the topology of routing?

Topology, also called routing order. The wiring order for a network with multiple ports.

40. How to adjust the routing topology to improve signal integrity?

The signal direction of this network is more complicated, because the topology has different effects on unidirectional and bidirectional signals, and signals of different levels and types. It is difficult to say which topology is beneficial to signal quality. In addition, when doing pre-simulation, it is very demanding for engineers to know which topology to use, and they must understand the circuit principles, signal types, and even wiring difficulties.