Introduction to Self-Driven Synchronous Rectification

Publisher:Tianran2021Latest update time:2012-11-18 Source: 维库电子Keywords:Drive Reading articles on mobile phones Scan QR code
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The self-driving method is the simplest synchronous rectification driving method. It is shown in Figure 1. The two diodes DF and DR are replaced by MOSFETs QF and QR. In the self-driving technology, the voltage on the secondary side of the transformer is used to drive the gates of the synchronous rectification elements QF and QR. Although not shown in Figure 1, an independent winding can be used on the secondary side of the transformer to drive the forward synchronous rectification QF or the return synchronous rectification QR. This can usually be done by using a winding with a different turns ratio from the primary winding as the gate drive winding. This method is suitable for applications with higher output voltages.


Figure 1 Self-driven synchronous rectification

FIG2 shows the waveform of the resonant reset forward self-driven synchronous rectification working in the continuous conduction mode, draws the working waveform of the source-drain voltage of QF and QR, and shows the source-drain waveform of the primary-side MOSFET.

The first question: for self-driven synchronous rectification, it is the conduction interval of the two body diodes of QF and QR. In the optimal conduction state, the resonant reset will occur when the primary side MOSFET Q1 enters the off state. When the input is low, the Q1 drain voltage just returns to the input voltage value before Q1 turns on again. At the input low line, the converter will operate at the maximum duty cycle DMAX state. Assuming that the converter is designed for a 2:1 input variation range, the duty cycle is inversely proportional to the input line voltage, so the duty cycle will be 0.5DMAX at the high-side line input. In the resonant reset converter, the reset time interval will not change over the entire line variation range. That is to say, the time interval is 0.5DMAX. This is very clear. At the traditional maximum 50% duty cycle, the maximum time interval can only be 25% of the switching period.

Looking at Figure 2 again, during this bad time interval, the body diodes of QF and QR are in the on state, and the forward rectifier MOSFET is turned on to flow the negative magnetizing current converted to the secondary side. At this moment, the return MOSFET is carrying the difference current between the inductor current and the forward MOSFET current. The conduction of QR's body diode during such a long interval is very undesirable, which will greatly increase the loss. In addition, since the body diode carries a large current, when the primary side MOSFET Q1 is turned off, its reverse recovery time will be very serious. The forward MOSFET will also increase the conduction loss during this time interval because the magnetizing current flows through the body diode. Of course, since the magnetizing current is usually much smaller than the load current, this loss is not very large compared to the return switch.


Figure 2 Resonant reset forward self-driven synchronization

The second question: for self-driven synchronous rectification, that is, the change of RDS (ON) within the range of line voltage variation. Low-voltage MOSFETs are suitable for self-driven synchronous rectification, and their on-resistance RDS (ON) corresponds to VGS = 4.5V, and the maximum gate voltage allowed is ±20V. The gate of the synchronous QF for rectification is driven by a voltage proportional to the line voltage, while the gate of the return MOSFET is driven by a constant voltage during the transformer reset period. The designer must choose a suitable turns ratio NP/NS for the main power transformer. So that it is sufficient to drive the rectifier MOSFET at the low end. Make it reach the ohmic value range of the low line. The design compromise appears at the high-end line, at which time it may exceed the maximum gate-source voltage range of the rectifier MOSFET. For the standard communication input range of 36V~75V; a reasonable choice should be about 6:1, which will give 6VVGS to drive the rectifier MOSFET at the low line, and it increases to about 12.5V at the high line. The experimental data of a MOSFET shows the variation of its RDS(ON) within this VGS range. For some MOSFETs, this variation can exceed 10%. If the transformer turns ratio NP/NS is higher than 6:1, the variation of RDS(ON) will be even higher because RDS(ON) will increase significantly when the gate voltage is lower than 6V.

In self-driven synchronous rectification, the gate of the synchronous rectification MOSFET is driven directly from the transformer. The energy to turn the synchronous rectifier on or off comes directly from the line. The average current driving the rectifier is proportional to the switching frequency and proportional to the gate-source voltage. Therefore, a change in the input line voltage exceeding 2:1 will also cause the average drive current to change by 2:1. Since the return synchronous rectifier is driven by a constant gate voltage, the average charging current is also essentially constant over the entire line variation range.

Another disadvantage of using self-driven synchronous rectification to replace the diode rectifier is the loading of the resonant reset circuit. Figure 3(a) shows the capacitance of the resonant circuit, and Figure 3(b) shows the equivalent resonant capacitance and inductance. (referred to the primary side).


Figure 3 Primary capacitor circuit and secondary synchronous rectification circuit

(a) Capacitance of a resonant circuit (b) Equivalent resonant capacitance and inductance

During the reset interval, the VDS of QF is a half-sinusoidal voltage, which can be seen as a resonant reset circuit with QR gate-source capacitance and QF's Coss acting as a load. The net effect of this load is to increase the reset interval, assuming that the transformer magnetizing inductance remains constant. If it is still required to remain constant after adding self-driven synchronous rectification, the magnetizing inductance will have to be reduced, which will result in a short reset time, thus generating a higher peak reset voltage. Reducing the magnetizing inductance will also increase the circulating losses, and more energy will be stored in the transformer.

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