Design and implementation of digital UPS based on μC/OS-II

With the development of information technology, uninterruptible power supply ( UPS ) is developing towards digitalization, intelligence, networking, large-capacity multi-machine redundancy and greenness. High-performance dedicated DSP chips provide a good hardware foundation for the digitalization of UPS, while embedded real-time software operating system is the core of digital products.

For digital UPS, this paper presents a system control design based on real-time multitasking operating system μC/OS-II. The design uses μC/OS-II as the kernel to realize its transplantation on TMS320LF2407A . Through the analysis of the structure and function of the UPS control system, each part of the control function is divided into tasks of different priorities for scheduling and implementation, and some parameter settings and main program lists are given. Practice has proved that the digital UPS system based on μC/OS-II improves the real-time performance of the control system and the reliability and stability of the system operation.

2 Digital UPS control system structure

TMS320LF2407A is a 16-bit high-performance microcontroller launched by TI specifically for the field of industrial control. It has high computing speed and rich on-chip resources, and can well meet the functional needs of digital UPS power control systems. The overall design block diagram of the digital UPS system is shown in Figure 1. The dotted box is the main control module, which is divided into A/D conversion, PWM (Pulse Wide Modulate) inverter control, phase-locked control, protection control, keyboard and LCD display, communication interface, real-time clock and other functional modules according to function.

4 Digital UPS task design and scheduling

The main program flow chart of the control software is shown in Figure 3. Through the analysis of the structure and function of the UPS control system, each control function is divided into tasks of different priorities, which are scheduled by the μC/OS-II real-time kernel to achieve multi-task parallel execution.

Figure 3 Main program flow chart

(1) Digital UPS task design: As shown in Table 1, a hierarchical and modular design concept is adopted. According to the importance and real-time nature of each task, the user program is divided into 9 tasks of different priorities, including data acquisition and PWM wave calculation, phase-locked synchronization, communication processing, system parameter calculation, system status detection and processing, keyboard scanning, keyboard processing, LCD display, and idle tasks. The more important the task, the stronger the real-time nature, and the higher the task priority. The idle task does not perform any function and is always in the ready state. It is only executed when other tasks are idle.

Table 1 Digital UPS task functions and their descriptions

(2) μC/OS-II task scheduling: completing the transition of tasks between the running state, ready state, suspended state, dormant state and interrupt state is the core function of the real-time multitasking operating system. The process is shown in Figure 4. The task scheduling of μC/OS-II is a priority-based preemptive scheduling algorithm. The system has a total of 9 tasks and 3 interrupts. The system allocates a word (OSTCBPrio) in the task control block (OS_TCB) to indicate the priority of each task. The smaller the value, the higher the priority. When task scheduling occurs, the system finds the highest priority task through the task ready table and calls the function OS_TASK_SW() to complete the task switching.

(3) Digital UPS interrupt: Three hardware interrupts are designed. One is the AD sampling interrupt, which has the highest priority and uses an adaptive frequency method to sample 32 points per cycle. The other is the system clock beat interrupt, which has the second highest priority and interrupts once every 10ms as the system clock. The last is the communication interrupt, which has a low priority. When external data is received, an interrupt occurs and the received data is processed.

(4) Communication and synchronization between tasks: Communication between multiple tasks is achieved by accessing shared data resources, and semaphores are used for synchronization between tasks. To achieve synchronization between tasks, this software system establishes three semaphores:

The data calculation semaphore OSPWMCntSem is used for communication between Task 1 and the data acquisition PWM wave calculation subroutine. This semaphore is sent out every time an interrupt sampling is completed, telling Task 1 to calculate and process the collected data and PWM wave.

Fig. 4 Task scheduling flow chart.

The communication semaphore OSComSem is used for communication between Task 3 and the communication interrupt subroutine. Once a signal from the host computer is received, the interrupt subroutine sends this semaphore to tell Task 4 to process the received data.

The keyboard semaphore OSKeySem is used for communication between Task 6 and Task 7. Once a key is scanned and pressed, the semaphore is sent to tell Task 7 to perform keyboard processing.

Figure 1 Overall block diagram of digital UPS system

(1) A/D conversion: It completes the sampling of AC voltage and current signals of the mains input, AC voltage and current signals of the inverter output, and battery voltage and current signals. It is the basis for the realization of system digital control and UPS remote monitoring function. According to the LF2407A A/D conversion level requirements, the sampled signal must be converted to a 0~3V DC level through the signal detection module. In order to improve system performance, the input/output voltage and current are sampled at an instantaneous value with a sampling frequency of 10kHz.

(2) PWM inverter control: The PWM inverter control algorithm is the core algorithm of UPS system control, which determines the output performance of the UPS system.

The inverter algorithm uses the powerful numerical operation performance and high-speed computing capability of LF2407A to calculate the PWM signal pulse width in real time online. Then the full comparison unit of the A event management module (EVA) outputs 4 PWM signals (PWM1~4) with dead-zone control. These 4 PWM signals drive the inverter through the isolation drive module.

(3) Phase-locked control interface: Utilize the event capture ports CAP1 and CAP2 of LF2407A to send the AC input and inverter output to CAP1 and CAP2 after voltage reduction and waveform transformation. LF2407A uses the software phase-locked loop algorithm to achieve the same frequency and phase of the inverter output voltage and the AC voltage.

(4) Communication interface: To realize the real-time monitoring function of UPS, the host needs to collect the analog parameter sampling data of UPS power supply and the switch data representing the working status in real time and at high speed. The SCI asynchronous communication interface of LF2407A and the RS-485 physical standard protocol are used to realize the remote communication between UPS and host, so as to query the UPS equipment status, various parameters and fault information.

(5) Keyboard operation and LCD display: Provides a human-computer dialogue platform. Users can set the operating mode, device communication address and other information through keyboard operation; the LCD screen displays the working status and parameter information in graphic form and provides a visual menu.

(6) Real-time clock: The serial peripheral interface SPI is used to communicate with the LF2407A controller, providing a unified and standard clock reference for the entire system. In addition, the memory of the clock chip is used to store the system power-off protection parameters.

3. Transplantation of μC/OS-II on LF2407A

The hardware and software architecture of μC/OS-II is shown in Figure 2.

Figure 2. Hardware and software architecture of μC/OS-II

In order for μC/OS-II to run normally, LF2407A must meet the following requirements: the processor's C compiler can generate reentrant code and support extensible and linkable assembly language modules; interrupts can be turned on and off using C language; the processor supports interrupts and can generate timed interrupts; the processor has instructions to read the contents of the stack pointer and other CPU registers and store them in the stack or memory.

Since μC/OS-II is an open-source operating system, and its structured design makes it easy to separate the processor-related parts, the main work of porting μC/OS-II to the LF2407A processor is to modify the code of the processor-related parts. As can be seen from Figure 2, they are mainly concentrated in three files: header file OS_CPU.H, C file OS_CPU_C.C, and assembly file OS_CPU_A.ASM.

(1) Modify OS_CPU.H: It contains two parts of code, data type definition code and processor-related code. The stack data type definition of LF2407A is: typedef unsigned intOS_STK; all stacks are declared with OS_STK, the address decreases from high to low, and OS_STK_GROWTH is set to 1.

The rest of OS_CPU.H is the declaration of the underlying functions that must be defined for porting. In order to make the low-level interface functions independent of the processor status and to make it possible for tasks to call corresponding functions without knowing the function location, the soft interrupt instruction SWI is used as the underlying interface, and different function numbers are used to distinguish each function. The definition format is as follows:

__swi (0x00) void OS_TASK_SW(void); //task switching function

Among them, swi is the soft interrupt flag, 0x00 is the assigned interrupt number, OS_TASK_SW is the function name, and the two voids represent the return type and parameter type respectively. The definitions of other low-level function interfaces are similar to this.

(2) Modify OS_CPU_C.C: Initialize the task stack function and the implementation of the soft interrupt function. Modify the OSTaskStkInit() function, the code is as follows:

OS_STK *OSTaskStkInit (void (*task)(void*pd)， void *pdata, OS_STK *ptos, INT16U opt)

{Simulate function call with parameters (pdata); define task stack; initialize task stack structure using full stack decrement method; return stack structure;}

Implementation of soft interrupt function:

void SWI_Exception(int SWI_Num, int *Regs)

{ /* Jump to different underlying service function addresses according to different Num values ​​(function numbers), such as: */ case 0x00: task switching function OS_TASK_SW;}

(3) Modify OS_CPU_A.S: including 4 simple assembly language functions: OSStartHighRdy(): starts the task with the highest priority in the ready state; OSCtxSw(): implements the task switching function at the task level; OSIntCtxSw(): implements switching between tasks at the interrupt level; OSTickISR(): clock tick interrupt service subroutine.

(5) μC/OS-II main program framework: Before calling any service, μC/OS-II requires that the system function OSInit() be called first to initialize all variables and data structures, and to establish an idle task. The startup of multiple tasks is implemented through OSStart(), but at least one application task must be established before startup. When OSStart() is called, OSStart() finds the task control block of the highest priority task established by the user from the task ready table, and then calls the task start function. Next, it is completely handed over to the real-time operating system for management. The real-time kernel continuously switches and schedules tasks, and manages various application tasks and system resources. The system main program list is as follows:

5 Experimental Results

According to the above control system design, a 3.75KVAUPS prototype was successfully developed. The following is the real-time, reliability and stability test operation of the prototype. The test equipment and instruments include: Tektronix TDS3043B digital oscilloscope, Gad-2016 distortion tester, FLUKE189 digital multimeter, FLUKE36 clamp-type ammeter, infrared thermometer, load three-phase 3KW bulb (about 3.75KW furnace wire).

(1) Mains input 380V, load change: output phase voltage stability 220V±1%, U phase frequency stability 50Hz±0.4%, waveform distortion <2%, other two phases are basically the same as U phase, any two phases phase difference 120°±1°. Figure 5 shows the inverter output waveforms at no load and full load.

(a) No load

(b) Fully loaded

Figure 5 U-phase output inverter voltage waveform.

(2) Mains-inverter switching, switching time and reliability test: Mains input 384V, battery voltage 490V, 3.75KW rated load operation, mains power failure or pressing the "force start" button, the inverter starts normally with load, the startup time is about 60ms. The switching time between mains and inverter is less than 120ms after repeated tests. Figure 6 shows the switching waveform from mains to inverter, the switching time is about 60ms, the waveform in the figure is detected by transformer isolation and voltage reduction; when mains power comes, the inverter stops working immediately.

Figure 6 Switching waveform from AC power to inverter

(3) Inverter emergency operation for a long time, output voltage test and system stability verification: The battery starts discharging at 513V, with a rated load of 3.75KW furnace wire, and runs for about 80 minutes. The temperature of the IGBT and the radiator is always below 32°C. The system works normally and stably. The test parameters are shown in Table 2.

Table 2 Inverter operation temperature rise test

6 Conclusion

This paper presents the overall design structure of the digital UPS based on LF2407A, implements the transplantation of the real-time operating system μC/OS-II on LF2407A, designs and implements the scheduling of UPS system tasks, and presents some parameter settings and main program lists. This design has been successfully applied to the design project of Qingdao Chuangtong 3.75KVA digital UPS. Practice has proved that the application of μC/OS-II in embedded UPS control systems effectively improves the real-time performance of system control and the overall reliability and stability of the system.