4.2 W GU10 LED Lighting Driver Using Primary-Side Feedback

summary

This article will introduce you to a low-power LED lighting driver solution using TI's offline primary-side sensing controller TPS92310. Due to the use of a constant on-time flyback topology and primary-side sensing control, this solution can achieve high efficiency and good line and load regulation. For GU10 replacement LED bulbs, the reference design PMP4325 has a suitable small form factor (30mm×18mm×10mm), which can support common AC line input and 3 or 4 LED series outputs with a constant output current of 350mA. Experiments show that for LED lighting, this solution has good line and load regulation, high efficiency, and overall LED lighting protection.

1 Theoretical operation

1.1 TPS92310 Controller

For LED lighting with lower rated power, the single-stage flyback structure is an attractive topology. The single-stage flyback structure is widely used in LED lighting for the following reasons:

l Galvanic isolation reduces overall bill of materials (BOM) cost

l High power factor using special control architectures (e.g. constant on-time control, etc.)

Smaller size compared to other two-stage topologies

Although the single-stage flyback structure has many advantages when used in LED lighting, there are still some problems that need to be solved. These problems include:

l High power factor

l Stable line voltage and load regulation to achieve primary side feedback (PSR)

l LED open circuit or short circuit protection

The TI TPS92310 controller is a single-stage primary-side sensing AC/DC controller for driving constant current of high-brightness LEDs. It operates in zero-current sensing transition mode (TM). The "on time" (TON) is almost constant during the line voltage half cycle. Therefore, it has inherent power factor correction (PFC) because the peak current of the main winding varies with the input line voltage curve. TON is adjusted to regulate the LED current to a preset level, which is set by an external sense resistor. TON is also used in the control design of flyback, boost and buck-boost converters. This converter operates in transition mode and uses fixed on-time control to achieve high power factor. In addition, TON can also be used to control a buck converter operating in transition mode, whose general-purpose LED driver uses peak current control.

Primary-side detection does not require optocouplers and secondary-side circuits, resulting in fewer components and a more compact PCB solution. In addition, the controller features cycle-by-cycle current limiting, output short-circuit protection, output overvoltage protection (OVP) or open LED protection, short LED protection, and thermal shutdown protection, all of which provide protection measures for LED lighting.

1.2 Constant on-time control

In a conventional boost power factor correction converter, a constant on-time controlled transition mode is usually used to keep the input current in phase with the input voltage to achieve high power factor and low total harmonic distortion (THD).

For a single-stage flyback topology operating in transition mode, it is not inherently power factor corrected because the duty cycle and frequency are always changing during the shape cycle. Therefore, the power factor and total harmonic distortion are not ideal under this condition. Fortunately, a single-stage flyback topology operating in filtering mode can still achieve high power factor and low total harmonic distortion using a fixed (constant) TON. As shown in Figure 1, the average input current is a nearly sinusoidal wave with the same phase as the input voltage.

Figure 1 Current waveform during TON and TOFF

In this design, the TPS92310 controller is configured in constant on-time control mode, and the switch on-time can be fixed if a large capacitor is connected to the COMP pin to filter the 100-Hz line ripple of the single-stage flyback application. However, to reduce the size of the board, this reference design is not a single-stage structure without power factor correction, so a small compensation capacitor is used just to maintain the stability of the control loop. Since the DC input voltage of the flyback structure is relatively stable, the on-time is almost fixed.

1.3 Constant current control with primary side detection

Based on this, Figure 2 shows the primary current, secondary current and Vds voltage, and the average output current Io is calculated as follows:

in:

2 × Tdly = half of the ringing time on the MOSFET drain

N = Transformer turns ratio of primary winding to secondary winding

Ip_pk = primary current

Is_pk = Secondary current

Io=average output current (LED current)

Figure 2 Current and Vds voltage waveform

To regulate the output current, the converter uses a PWM control circuit as shown in Figure 3. This circuit includes both charging and discharging modes of operation. The charging mode of operation is controlled by the internal reference current IREF × time (TON + TOFF + 2TDLY). The discharging mode of operation is controlled by the TOFF switch and the Ipk current source, which is proportional to the primary side peak current. The COMP voltage level can represent the gate drive TON.

During normal operation, if the discharge Q (Ipk × TOFF) is greater than the charge Q (IREF × (TON + TOFF +2TDLY)), the COMP pin voltage decreases, resulting in the gate output TON increasing in the next cycle. In addition, if the charge Q (IREF × (TON + TOFF + 2TDLY)) is greater than the discharge Q (Ipk ×TOFF), VCOMP rises, and the gate driver output TON increases in the next cycle. If the charge Q is equal to the discharge Q, the VCOMP voltage is stable. Therefore, when a large capacitor is connected to the COMP pin to filter the 100-Hz line ripple, a fixed on-time is generated in half a sine cycle, thereby achieving power factor correction. In the case where power factor correction is not used to maintain loop stability and only for flyback topology, a small capacitor can be connected to the COMP pin.

Figure 3. Charging and discharging block diagram

The controller implements primary current feedback and regulation to maintain a constant output LED current. Figure 4 shows a block diagram of the TPS92310 controller. The red dashed line represents a primary control loop.

1.4 ZCD detection, delay setting and output overvoltage

The zero-crossing detection (ZCD) pin detects zero current on the transformer auxiliary winding. When the ZCD voltage is lower than the VZCD(TRIG) level, the internal RS trigger sends a ZCD signal to the IDLY delay block to trigger the next switching cycle. The dual-layer detection (ARM/TRIG) of this pin ensures that the switching FET is "turned on" when there is zero current on the secondary side of the isolation transformer. Figure 5 shows a typical switching waveform of the switching FET "leakage current". The controller also provides 300ns of idle time for ZCD detection to avoid any possible ringing effects.

To reduce EMI and switching losses during converter operation, the TPS92310 controller uses a DLY pin. The delay timer can be easily controlled by connecting an external circuit resistor. With this IDLY pin, the converter can ensure zero current in the transformer winding without "turning on" the main switching FET. The preset delay timer value must be considered based on the resonant frequency between the isolation transformer main winding inductance and the switching FET drain charging. Using the following equation, we can calculate Tdly:

(2)

in:

Lp = transformer primary winding inductance

Coss = MOSFET output capacitance

Tdly is used to control the discharge time of VCOMP, so it must be set by an external circuit resistor connected to the DLY pin, as shown in Figure 6.

Figure 5 Typical switching waveform

Figure 6 Tdly setting curve

The ZCD pin also functions as an output overvoltage protection. The positive voltage on the auxiliary winding appears as an output LED voltage and is sensed by an external voltage divider resistor, as shown in Figure 7. The overvoltage on the ZCD pin exceeds the OVP threshold for 3 cycles. The driver output should be turned off and the controller implements restart mode. The OVP voltage is calculated as follows:

in:

Ns = auxiliary winding turns

Na = output winding turns

VD = forward voltage of output rectifier

The negative voltage on the auxiliary winding represents the reflected voltage of the input voltage, so when selecting RU, the power dissipation of the resistor needs to be considered. A current of 0.2mA to 0.5mA is suitable. A diode is connected to the ZCD pin to control this negative voltage below 1V. We always connect a small capacitor C between the ZCD pin and GND to eliminate possible ringing effects, ensure accurate OVP, and achieve proper valley switching.

Figure 7 ZCD pin connection circuit

1.5 Output short circuit protection

The TPS92310 controller operates in voltage mode control and requires cycle-by-cycle limiting to achieve OCP and SCP. In this isolated flyback structure, the controller provides two constant on-time modes with different OCP thresholds (0.64V and 3.4V). The main current sense voltage can be calculated using the following equation:

in:

REF = 0.14 of controller

VLED = 12 V

VD = 0.8 V

Vin_min = 127 Vdc

In this design, Vor is approximately equal to 85V, which is Nx(VLED + VD)

η = efficiency, estimated to be about 0.8 at low line voltage

For this conventional flyback design, Visns is approximately 0.53 V.

Since Vin_min voltage is fixed and Vor design voltage is almost fixed, Visns is almost constant when LED voltage is different. The detection voltage is lower than OCP threshold, so we can configure constant on-time mode with 0.64 V OCP threshold to achieve excellent output short-circuit protection. This mode can be used in all traditional flyback designs. To avoid ringing interference of ZCD detection during output short circuit, a small-capacity capacitor must be connected between ZCD pin and GND to eliminate pseudo ZCD detection. A 10-Pf capacitor is suitable for this design. Figure 8 shows the output short-circuit waveform.

Figure 8 Output short circuit protection (SCP) waveform

1.6 External Line Voltage Regulation Compensation

Due to the inherent propagation delay of the controller, there are different peak currents at high line and low line, as shown in Figure 9. With the same propagation delay, a high line input voltage will produce a higher current difference than a low line input voltage. According to Equation 1, the input current sensing error will affect the LED current, resulting in poor line regulation. When the input voltage changes from low line to high line, there are two ways to improve the line regulation:

1. Add a fast turn-off circuit as shown in Figure 10. It can reduce the MOSFET switching delay and improve the 5 mA current tolerance at 230 Vac in this design.

2. Add an input voltage detection circuit (as shown in Figure 11) to shorten the on-time under high line voltage; by adjusting R17 to 110 Vac and 230 Vac line voltage, the ideal high current accuracy is achieved. R19, R19 and R20 determine the inflection point of the LED current. Figure 12 shows the line voltage regulation ratio curve using external compensation.

Figure 9 Intrinsic propagation delay

Figure 10 Rapid shutdown circuit

Figure 11 External line voltage regulation compensation circuit

Figure 12 Line voltage regulation compensation curve

2 Transformer Design

According to the previous description, to use an external SCP circuit, Visns must be set below 0.6V.

in:

Visns = primary current detection voltage (less than 0.6V if using external SCP circuit, otherwise unlimited)

Rcs = Current Sense Resistor

N = Transformer turns ratio between primary winding and output winding

IP = primary peak current

Vor = primary reflected voltage of secondary voltage

ILED = LED current

VLED = LED voltage

η = estimated power supply efficiency

VD = forward voltage of output rectifier

Vin_min = minimum input DC voltage, usually simplified to 1.3 Vac_min

The transformer specifications are calculated as follows:

in:

Lp = primary winding inductance

Np = Number of turns in primary winding

Nout = Number of output winding turns

Naux = Number of auxiliary winding turns (usually less than the calculated value due to peak voltage)

DMAX = Maximum duty cycle (calculated using Equation 2)

FS_MIN = Low line voltage sets minimum switching frequency

△BMAX = Select the maximum operating flux density

Ae = Effective core area

Vaux = Select VCC voltage

VD_out = Auxiliary rectifier forward voltage

Finally, we can select the RMS current and peak voltage of the primary MOSFET, and then select the MOSFET secondary rectifier, rectifier, and construct the transformer based on the RMS current and bobbin window.

3 Experimental Results

3.1 Electrical performance specifications

Table 1 PMP4325 electrical performance specifications

3.2 Reference Design Schematic

Figure 13 PMP4325 reference design schematic

3.3 PMP4325 PCB Layout

The reference design is implemented on a double-sided PCB with dimensions compatible with GU10 LED lamps and similar applications. To meet different requirements, two versions of the PCB layout files are provided:

1. Release version demo board without output SCP line voltage regulation compensation circuit.

2. PCB files for some customers who require powerful SCP and line voltage regulation functions

Figure 14 Component side and solder side of the demo board

3.3.1 PCB layout without SCP and line voltage regulation compensation circuit

Figure 15 PCB layout of the release version demo board

3.4 Electrical performance

Figures 16 through 18 show typical performance curves for the PMP4325 9-V and 12-V, 350-mA LED driver.

3.4.1 Efficiency curves for 3-LED and 4-LED applications

Figure 16 Efficiency curves for 3-LED and 4-LED loads

3.4.2 Line voltage regulation curve

Figure 17 LED current line voltage regulation

3.4.3 Line voltage regulation curve using compensation circuit

Figure 18 LED current line voltage regulation using compensation circuit

3.4.4 Startup output waveform

Figure 19 110VAC start-up test Figure 20 230VAC start-up test

3.4.5 Output ripple voltage and current

Figure 21 110VAC output ripple test Figure 22 230VAC output ripple test

3.4.6 Output Overvoltage and Open LED Protection

Figure 23 110VAC OVP test Figure 24 230VAC OVP test

3.4.7 2-LED Protection

Figure 25 Short-circuit 2 LED test at 110VAC Figure 26 Short-circuit 2 LED test at 230VAC

3.4.8 Output short circuit protection

Figure 27 110VAC output short circuit test Figure 28 230VAC output short circuit test

3.5 Conducted Electromagnetic Interference (EMI)

3.5.1 EMI of 4LED GU10 load when using Y capacitors

Figure 29 Conducted EMI with 230VAC power supply Figure 30 Conducted EMI with 230VAC power supply

3.5.2 EMI of 3-LED GU10 Load Using Y Capacitors

Figure 31 Conducted EMI with 230VAC power supply Figure 32 Conducted EMI with 230VAC power supply

3.5.3 EMI of 3-LED GU10 Load Without Y Capacitors

Figure 33 Conducted EMI with 230VAC power supply Figure 34 Conducted EMI with 230VAC power supply

3.6 Bill of Materials

Table 2 PMP4325 Materials List

3.7 Transformer Specifications

This section describes the transformer's core and bobbin specifications, circuit diagram, electrical specifications, and construction diagram.

Core:EPC13

Core material: PC40, or other similar materials

Bobbin: 10-pin horizontal bobbin with the following dimensions:

Figure 35 10-pin horizontal bobbin

Figure 36 Transformer circuit diagram

Table 3 Transformer electrical specifications

Electrical strength

1 second, 60Hz, pin number from 1, 2, 9, 10 to 5, A

3000V

Primary Winding Inductance

Pins 1-10, all other windings on, measured at 10kHz, 1V

2.6MHz+/-10%

Figure 37 Transformer structure diagram

References

1. TI PFC product manual: "TPS92310 Offline Primary-Side Sensing Controller"