Optimizing power management for high-end application processors

Power management solutions for today's portable application processors are becoming increasingly integrated. Total power consumption, standby and sleep current consumption affect battery size, bill of materials cost and product acceptance. When designing a portable device such as a smartphone or PDA, the system designer must consider multiple variables of power supply. Smartphones are becoming increasingly power hungry and require highly integrated power management solutions to meet the overall design requirements of maximum battery life in the smallest possible PCB area. Today's application processors require separate power domains for the core, I/O, memory and peripherals. The LP3971 is a flexible power management unit (PMU) that can meet all requirements with the help of three high-efficiency step-down converters and six LDOs. Application processors require multiple supply voltages that can be optimized according to the requirements of the core power manager and system architecture. The LP3971 meets a wide range of system requirements with I ² C controlled output voltages and factory configurable power-up sequencing and default output voltages. This design idea focuses on using the LP3971 step-down converter and LDOs for PDAs or smartphones to power the low voltage rails of the microprocessor.

When designing a system, engineers must balance requirements such as cost, PCB area, component size, talk time, standby time, battery capacity, and schedule. The RAM requires a 1.5V supply with a maximum current of 400 mA. Let's start with the simplest, lowest-cost solution - a low-dropout (LDO) regulator connected directly to the lithium-ion (Li-Ion) battery shown in Figure 1. The battery voltage starts at 4.2V and gradually decreases to 3.2V, and the system is dormant until the battery is charged or replaced. Figure 2 illustrates a typical lithium-ion battery discharge cycle. For the configuration shown in Figure 1, the efficiency of the LDO 5 is:
LDO% Efficiency = [(V _OUT ×I _OUT ) / V _IN ×(I _OUT + Iq)] × 10For this example and all other examples in this article, Iq is ignored because it is small compared to I _OUT (400 mA). The efficiency equation then becomes: LDO % Efficiency = [(V _OUT ) / (V _IN )] × 100 If V _IN = 4.2 V and V _OUT = 1.5 V, the LDO efficiency is 1.5/4.2 = 36%. Total Power (P _T ) = 4.2 × 0.400 = 1.70 W All the power not delivered to the output load will be dissipated as heat within the LDO. Power Dissipation (P _D ) = (V _IN - V _OUT ) × I _OUT = (4.2 - 1.5) × 0.400 = 1.1 W 1.1 W of power will be dissipated as heat. We just calculated the maximum continuous power dissipation (P _T ). The RAM will not operate at this level for long. If the duty cycle is 10%, the average power dissipation is: P _T = 0.10 × 1.7 = 0.17 W The amount of time the RAM operates at I _MAX depends on the application, power management firmware, and operating system. As shown in Figure 2, the battery voltage will not stay at 4.2V for a long time. Let's recalculate the power consumption of a battery with a rated voltage of 3.6V.

V _OUT is still 1.5V, so the LDO efficiency is 42%. If the system requires low power consumption and the configuration shown in Figure 1 is not met, consider the solution shown in Figure 3, where the input of LDO 5 is connected to the output of Buck 3 (which is set to 1.8V to power the memory).

For the configuration shown in Figure 3, when the input of LDO 5 is tied to the 1.8V rail, the efficiency is calculated as follows:
LDO% Efficiency = V _OUT / V _IN = (1.5V / 1.8V) × 100 = 83% The power dissipation is approximately: PD = (V _IN - V _OUT ) × I _OUT = (1.8 - 1.5) × 0.400 = 0.12W 0.12W of power will be dissipated as heat. Note here that LDO 5 is 83% efficient. If we use a switching power supply instead of LDO 5, the efficiency is only 85%, which is only a 2% improvement for this module. However, the overall efficiency depends on the type of converter used. Using the efficiency curve from the LP3671 buck converter datasheet (Figure 4), the system losses caused by this dual conversion DC/DC + LDO account for 78% of the total system losses. The LDO is the lowest cost, smallest size, and lowest noise solution.

Adding another DC/DC converter to power the RAM would increase the PCB area by 10 mm2 ⁽ due to the large 3 mm × 3 mm inductor) and increase the overall noise of the system. If a 1.8 V supply is not available, any buck converter rail with a voltage lower than _{VBATT can be used. The lower the input voltage of the LDO, the more efficient it is—as long as the input voltage is greater than VOUT} + _VDROPOUT .

Conclusion

Don’t worry about when to use an LDO to power a low-voltage microprocessor as shown in this article. Ask yourself, “Do I really want to use an additional buck converter and inductor to improve system efficiency by just a few percentage points?” Using a buck converter to power a low-voltage rail increases the size of the PMIC, requires the addition of a 3mm×3mm inductor, and increases BOM cost and PCB area. In contrast, an LDO is economical, small, and easy to use, not to mention it is the lowest cost solution and can be optimized for your application.