Methods to reduce power consumption of switching power supply

Publisher:数字驿站Latest update time:2012-07-07 Source: 维库电子 Reading articles on mobile phones Scan QR code
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The power consumption of a switching power supply includes fixed losses caused by parasitic resistances such as semiconductor switches, magnetic components, and wiring, as well as switching losses during switching operations. As for fixed losses, since they mainly depend on the characteristics of the components themselves, they need to be suppressed through improvements in component technology. In terms of magnetic components, research on low-loss winding methods that take into account both skin effect and adjacent wire effect has a long history. In order to reduce switching losses caused by switching surges originating from transformer leakage inductance, new circuit technologies such as snubber circuits with surge energy regeneration functions have been developed. The following are circuit and system methods for improving the efficiency of switching power supplies:

(1) Methods such as ZVS (zero voltage switching) and ZCS (zero current switching) that use resonant switching to reduce switching losses.

(2) Use edge resonance (Edge ResONance) represented by active clamping circuit to reduce switching loss.

(3) Reduce fixed loss by extending the on-time of the switching element to suppress the peak current.

(4) In low voltage and high current situations, fixed losses can be reduced by improving the synchronous rectification circuit.

(5) Use the parallel structure of the converter to reduce fixed losses.

Among them, the first method is very effective in reducing switching losses, but the problem is that the fixed loss caused by peak current and peak voltage will increase. The second method is an active snubber developed to solve this problem, which is a very practical ZVS method; however, the efficiency drop caused by reactive current under light load conditions is a major drawback. In the third method, the method of using a tap inductor is relatively effective, which can cope with the surge phenomenon caused by leakage inductance. Regarding the fourth method, the two-stage structure is one of the methods to achieve efficient operation of the synchronous rectification circuit. It uses a fixed time ratio (Time Ratio) close to 0.5, and the output voltage is controlled by the converter in the front stage. It is contrary to the traditional thinking mode that "the two-stage structure will lead to a decrease in efficiency" and is very effective in low voltage and high current situations. As for the fifth method, the entire converter circuit can be connected in parallel, or a partial parallel structure can be adopted like a current doubler. The following will briefly explain the efficiency improvement achieved by the parallel operation of the converter.

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