Designing an isolated bias supply is simple

This article will explore how to design isolated power supply circuits for gate drive, isolated sensing and communication circuits with the least parts, lowest complexity and most cost-effective method. This circuit can be used when the input voltage is low and a small (5%) voltage deviation is allowed when the circuit is powered on.

The example in Figure 1 shows an IC developed for a simple isolated bias supply. Any synchronous buck circuit that allows sink operation can be used. This circuit is called an asymmetrical half-bridge flybuck and operates in a very similar way to a synchronous buck regulator. The FET totem pole output connected to the input voltage supplies the LC filter. The filter output is then regulated via a voltage divider and the negative input of the error amplifier. The error amplifier controls the duty cycle of the FET totem pole output to maintain the DC voltage at the sense point.

The voltage across C6 is equal to the duty factor multiplied by the input voltage. As with the buck power stage, the voltage-second of the inductor must be zero. However, this circuit adds a coupled winding to the inductor and uses a diode to correct the reflected inductor voltage when the low-side FET is turned on. Since the inductor voltage during this period is equal to the output voltage, the output of the circuit will be regulated. However, the difference in voltage drop between the primary and secondary sides will reduce the regulation effect. In this circuit, the voltage regulation of the load will be affected by the forward voltage drop of diode D1. If the diode is replaced with a FET, the load regulation effect can be improved.

Figure 1: Synchronous buck circuit provides isolated power supply.

As with the coupled-inductor SEPIC, the parasitics of this topology also affect the circuit performance. During the on-time, the circuit is in good condition, with most of the current flowing into the magnetizing inductance of coupled inductor T1, charging C6. Output capacitor C3 supplies the load current. However, during the off-time, the two capacitors are placed in parallel through the coupled windings of the inductor. The two capacitors have different voltages, and only the parasitics in the loop limit the current between them. These parasitics include the ESR of the two capacitors, the winding resistance of the coupled inductor, the impedance of the low-order MOSFET and diode, and the leakage inductance of the coupled inductor.

Figure 2 shows the simulated current for different leakage inductance values. The upper half is the current in the primary of T1 and the lower half is the current in the output diode D1. The leakage inductance of a tightly coupled inductor of 10 nH is different from that of a loosely coupled inductor of 1 uH. For the tightly coupled inductor, the peak current is higher and is also substantially limited by the loop impedance.

For loosely coupled inductors, the peak current is lower. Higher leakage reduces the RMS current, helping to improve the efficiency of the power supply. Figure 2 shows a comparison of the two. Loosely coupled inductors can reduce current by up to 50%, reducing losses in a few components by up to 75%. The disadvantage of loose coupling is poor regulation of the output voltage.

Figure 2: Low leakage increases circulating current.

图 3 显示如图 1 的转换器所呈现的负载调节结果。如果负载电流受限制，在大部分的情况下，此转换器将提供足够的调节。在轻负载时，可看出二极管接面电压变化及振铃的影响。可能需要最小负载或 Zener 箝位，才能降低这些轻负载效应。在重负载时，电路的寄生组件会降低调节的效果。因此减少组件数有助于提升效果。例如，将二极管改换成同步切换，将大幅提升负载调节。

Figure 3: Flyback load regulation is good in most situations.

In summary, the flyback converter is an attractive topology that provides a low-cost and simple isolated power supply that can withstand 5% to 10% output voltage variations. The output efficiency of the diode rectifier at 5V remains good at 80%, and the synchronous rectifier will improve even more.

Reference
• Chen and Chen; “Small-Signal Modeling of Assymetrical Half-Bridge Flyback Converter,” IPEMC 2006.