Let's talk about the CV operation mode first. Most chips now directly sample the voltage on the auxiliary coil. Due to leakage inductance, after the MOS is turned off, that is, when the secondary diode is turned on, a spike will be generated, affecting the voltage sampling. In order to avoid this spike, most manufacturers use delayed sampling, that is, sampling the coil voltage after the MOS tube is turned off for a period of time. In order to avoid leakage inductance spikes. PI is sampled 2.5 μs after the high-voltage switch is turned off. This sampling method has actually been used in overvoltage protection on many chips in the past, such as OB2203, UCC28600, and NCP1377, so high-precision overvoltage protection can be obtained.
Some manufacturers also use a small-capacity capacitor in parallel with the lower sampling resistor to achieve this. At the same time, it is recommended that the absorption circuit use IN4007 with a recovery time of only about 2us and then connect a resistor of about 100 ohms for absorption. It can reduce the ringing caused by leakage inductance, thereby reducing the sampling error. Get a higher sampling accuracy. The number of secondary turns is fixed, the auxiliary winding is fixed, and the sampling accuracy is high. The internal accuracy of the comparator is also high, so naturally a higher output voltage accuracy can be obtained.
Let's write a basic transformer formula. Np*Ipk=Ns*Ipks (transformer secondary has only one winding Ns), Np, Ipk, Ns, Ipks are the number of primary turns, primary peak current, secondary turns, secondary peak current.
When working in DCM mode, the output current is the average value of the secondary current (the triangle in the figure) in one working cycle, so Io=(Td/T)*Ipsk/2, where T is the working cycle.
Np*Ipk=Ns*Ipks, so Ipks=Np*Ipk /Ns,
Substitute Ipks=Np*Ipk /Ns into Io=(Td/T)*Ipsk/2,
We get Io=(Td/T)*(Np*Ipk /Ns)/2.
It can be seen that Np and Ns are constants, and a fixed current output can be obtained as long as Ipk and Td/T are fixed.
Many ICs on the market fix Ipk by limiting the peak voltage on the primary MOS sampling resistor. At the same time, in order to avoid the current spike generated by the parasitic capacitor when it is turned on, a blanking time is added.
Td/T is fixed inside the IC. OB's is 0.5 (it gives the relationship between TD and frequency), BYD's 1508 directly gives 0.42. Fairchild's 1317 does not directly give this value, but gives a formula to calculate the primary current. This also indirectly tells Td/T.
When CC is used, under different output voltage conditions, it works in PFM mode to ensure a fixed Td/T and achieve a stable output current. This is the basic principle of achieving constant current, which can ensure that the current remains unchanged when the output voltage changes. As long as the accuracy of IC Td/T and the current limiting accuracy of the primary peak current are guaranteed, a higher output current accuracy can be obtained. These two parts basically depend on the IC. There is no problem in ensuring 1% of the sampling resistor.
Io=(Td/T)*(Np*Ipk /Ns)/2。
It can be seen that Np and Ns are constants, and a fixed current output can be obtained as long as Ipk and Td/T are fixed.
When CC is on, changes in load voltage will cause changes in frequency. When the voltage is high, the frequency increases, and when the voltage is low, the frequency decreases. This ensures a stable output current. Later, we will analyze how PSR compensates for changes in inductance and the reasonable selection of inductance.
The change of the capacitor terminal is a process. In CC mode, when the load becomes smaller, the output voltage drops, Td and T will increase at the same time, but the ratio remains unchanged. Because Ipk*ton is constant. Because Vin and L are constant. According to the volt-second balance. Vin*Ton=N*Vo*Td, Vin and Ton are constant, N is a constant, so the change of output load will cause the change of output voltage, and the change of output voltage will cause the change of Td, and Td/T is fixed by IC. So in the end it is the change of frequency. Let's talk about the principle of PSR compensation for inductance. Friends who have watched the PI LN60X experimental video can see that their PSR compensates for inductance.
When the inductance is lower than the normal design value, the time required to reach the same peak current is shorter, Δt=L*ΔI/V, ΔI is equal to the peak current in DCM mode, and the peak current is fixed. V is Vin, which is a constant. Therefore, low L will cause Δt to decrease, that is, Ton to decrease. According to the volt-second balance, Ton*Ipk*Np=Td*Ipks*Ns. Np, Ns are constants, and the decrease in Ton also causes Td to decrease. Since Td is a fixed value compared to T in the previous cycle, the decrease in Td causes T to become smaller, so the frequency increases. However, there is a limit on the maximum frequency.
Therefore, when designing, it should be noted that the frequency cannot work at the highest frequency when the load is the heaviest, so that the change of inductance will not be compensated. It should be appropriately lower than the highest operating frequency. When the inductance is higher than the normal value, the result is of course the opposite. Io=(Td/T)*(Np*Ipk /Ns)/2. As long as Ipk, Td/T remain unchanged, the output current will not change. Therefore, the change of inductance causes the change of frequency. It can also be seen from the formula P=1/2*I*I*L*f. I is fixed, the output power remains unchanged, and the change of L causes the change of frequency f. But you must pay attention to the maximum operating frequency limit.
Power supply parameters (7*1W LED driver): Input AC 90-264V Output: 25.8V 0.3A From the IC data, we can see that Td/T=0.5 CS pin limit voltage Vth_oc is 0.91V FB reference is 2V, duty cycle D is 0.45 Vin is 90V Rectifier tube VF is 0.9 Maximum switching frequency is 50KHZ Transformer uses EE16, AE=19.3mm^2 VCC power supply winding voltage is 22V (Considering the compatibility of different number of LED strings, the VCC winding voltage is higher, but usually based on experience, the chip maximum value minus 2v is taken)
1. Calculate the secondary peak current Ipks:
Io=(Td/T)*Ipsk/2
Ipks=Io*2/(Td/T)=0.3*2/0.5=1.2A
2. Calculate the reflected voltage Vor: Based on the volt-second balance
Vin*Ton=Vor*Td
Vin*Ton/T=Vor*Td/T
Vin*D=Vor*Td/T
90*0.45=Prev*0.5
Pre=81V
3. Calculate the turns ratio N
Vor=(Vo+Vf)*N
N=81/(25.8+0.9)=3.03
4. Calculate the primary peak current (taking into account the loss of part of the primary current during conversion, such as part of the loss in absorption, core loss, output capacitor loss, and secondary copper loss). The primary current loss is 7% of the output current.
Ipk=Ipks*(1+7%)/N=1.2*(1+7%)/3.03=0.424
5. Calculate the primary inductance
Vin/L=ΔI/Δt In DCM mode, ΔI is equal to Ipk
vin/L=Ipk/(D/f)
L=vin*D/f/Ipk=90*0.45/50K/0.424=1.91mH
6. Calculate the number of primary turns Np, Ns (B takes 0.3mT)
NP=L*I/(AE*B)=1.91*0.424/(19.3*0.3)*10^3=140TS
NS=NP/N=140/3=46.6TS When taking 47TS, reverse calculation is 47*3.03=142TS
NA=NS*VA/(Vo+VF)=47*22/(25.8+0.9)=39TS
7. Voltage sampling resistor
When the power supply winding voltage is 22V, the FB reference is 2V, and the upper and lower sampling resistors are exactly 10 to 1, taking 6.8K and 68K
8. Current detection resistor Rcs
Rcs=Vth_oc/Ipk=0.91/0.424=2.15 Use 2.7 and 11 ohm resistors
9. Diode reverse voltage
=Vin_max/N+Vo=264*1.41/3.03+25.8=149V Take SF14 with a withstand voltage of 200V
10. MOS withstand voltage and leakage inductance peak value is Vlk75V
=Vin_max+Vor+Vlk=373+81+75=529V Considering the power consumption, 2N60 is selected.
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