Optimized design of LED large screen output circuit

1 Introduction

As the requirements for data output speed of display systems such as large LED screens are increasing, the preferred method in the current transformation of control equipment is to replace the microprocessor with a higher speed, while the potential of hardware circuits is often easily overlooked.

In practical application, it is recommended to first consider hardware circuit modification on the original system. If it still cannot meet the display requirements, you can consider replacing the high-speed microprocessor and using FPGA/CPLD devices to replace the output circuit processing. This article takes the LED large screen control circuit as an example and proposes a method to improve the display data output speed through hardware circuit modification.

2 Optimization principle of data output circuit

From the display principle of the LED large screen, it can be known that the process of displaying a data on the LED large screen is divided into two steps: reading data from the memory and sending it to the LED board for display. This process requires the generation of the following control signals: data address sent to the memory, memory read signal, latch opening and row signal in the LED unit board, SCK shift of HC595, RCK latch, E enable signal, etc. The generation of these necessary signals increases the time of the data display process. If the signals can be reused, the delay of this process will inevitably be reduced. In the LED display system, the method of storing the display data in an external ROM/RAM by row is an example. This method sets the high bit of the memory and connects it to the row control line of the LED. The data is stored by row. After the data address is sent, the data is read out by row, and the row control signal is turned on at the same time. The following signal multiplexing scheme is also based on a similar principle.

Figure 1 Signal multiplexing example

When examining the MOVX command for reading external memory, it is found that a read signal (RD#) can be generated when executing this command, that is, when reading external memory, not only is it not necessary to generate a read signal (RD#) separately, but this signal can also be used for the latch 74HC273 and the shift signal SCK on the LED board. It should be noted that the SCK signal is sent out after the data is read out, so the RD# signal cannot be used directly as the SCK signal, and a delay must be performed (the minimum delay must be slightly greater than the sum of the RAM read and write time tRC and the data latch delay tTL H of the 74HC273).

When continuously reading a block of memory data, it is necessary to generate new addresses through the program and assign them to the data port, and these addresses change sequentially. Based on this feature, the design uses a counter circuit to save the initial address when reading data. By using externally supplied pulses, the data can be read continuously as long as the stored address of the counter is sequentially increased.

[page] The ALE pin of the microcontroller or the serial port working mode will also generate pulses of a certain frequency, but the pulse frequency generated by the SPI mode is not as high, and the use of these two methods has certain restrictions, and starting the SPI mode is more convenient. The Serial Peripheral Interface (SPI) bus system is a synchronous serial peripheral interface, which was first defined by Motorola on its MC68HCXX series processors. The SPI system has 4 I/O pins, which are the serial clock SPSCK, the host input/slave output data line MISO, the host output/slave input data line MOS I and the low-bit effective slave select data line SS. SP2SCK is used to synchronize data transmission from the MOSI input and the MISO output. By setting the SPI control register SPCR, the frequency of SPSCK can reach up to 1/4 of the oscillator frequency (fOSC).

Because the SPI mode can easily generate high-frequency pulses, that is, using SPSCK as the pulse of the counter, the counter generates continuously changing addresses for the memory, and realizes high-speed data reading. And the SPSCK signal is transformed and delayed, and can be used as the SCK shift signal for the LED at the same time.

Figure 2: SPI usage in reading memory

3 Implementation process of SPI application

From the above, we can get the following inspiration: In the design of LED control circuit , data can be read with the help of SPI mode, that is, adding a SPI mode FLASH memory, which can save important documents on the one hand, and use the signal generated by SPSCK on the other hand to realize high-speed data reading of the memory through the counter circuit, and reuse this signal to generate the control signal for screen display. After the first address of the output data is given and SPI is started, this method makes the process of data reading to screen display automatic. The full hardware method of the same signal source greatly reduces the connection delay when each control signal is generated separately in the past. Figure 3 is an example of the application of SPI in the LED large screen control circuit.

Figure 3 LED large screen control circuit diagram in SPI mode

The number of cascade counters is determined by the capacity of the RAM, that is, the number of address lines. The microprocessor is connected to the SPI serial memory through a driver, and the driver can select the model of 7407 or 7417. RM_MODE is used to distinguish different read and write operation modes. When RM_MODE = 1, it is the normal way to read and write external memory. When RM_MODE = 0, the host can be used as the master device and the serial FLASH memory as the slave device. The two communicate in SPI mode, and the SPSCK signal generated at this time is used to perform high-speed data read operations on the memory. At the same time, the SPSCK signal is transformed and delayed, and can be supplied to the LED as an SCK shift signal. At the input end of the counting pulse, a jumper can be used to select the addition and subtraction mode. When the pulse is connected to the UP end of the counter, it is an addition counting mode, and when it is connected to the DOWN end, it is a subtraction counting mode. Figure 3 can also be expanded and connected to multiple groups of counters and multiple groups of RAM.

[page]The use of the subtraction counter method greatly enhances the flexibility of data output. In the LED large screen display, the combination of the addition and subtraction counters can double the display length of the output data of the same control card. When using the subtraction counter method, in order to be consistent with the graphics and text displayed on the LED large screen when using the addition method, the data of the RAM connected to the subtraction counter must be exchanged between the upper and lower half screens, and the starting point of the data must be changed in the program when outputting, and the given line control signal (RCK) should also be processed in reverse order (see Figure 4).

Figure 4 Data organization and display in addition and subtraction mode

4. Precautions when using this method

When using this method, please note that the read and write speed of the counter and RAM chip must match SPSCK. The SPI method has a relatively high speed, and the higher the reading speed of each device in the circuit , the smaller the probability of data error.

In addition, there are other reasons that may cause errors when reading data, such as improper software writing causing the data address to exceed the RAM space, and circuit design not paying attention to the impact of heat generated by the counter working at high speed on peripheral devices and wiring.

When using the SPSCK signal to read external storage, an overflow error will also occur in the SPI master and slave modes, that is, when multiple data are transmitted continuously, the latter data overwrites the previous data and causes an error. The reason for this error is that the transmission flag SPIF of the slave device has a certain lag relative to the transmission flag SPIF of the master device. When the master device sends data continuously, the transmission flag of the slave device and the transmission flag of the next data of the master device will overlap. When the SPSCK is used to trigger the counter to increment the address to read data, the first received data will also be overwritten.

This transmission error can be improved by software and hardware methods. In the design of this article, the following solution was adopted in the later software writing: first start the SPI mode, then enter the counter to read the parallel RAM, wasting a timing sequence. Or when storing data in the RAM, store all of it in the address unit after it, and then use the pulse generated by the SPI method to read the RAM, and then you can get the correct data.

Theoretically, this method can make the output speed of display data as high as 1/4 of fOSC, but in actual application it is limited by the parameters of output circuit devices such as RAM and latch. The rate setting of SPSCK should be determined according to the parameters of the selected RAM, that is, it should meet the minimum address valid time and data valid time requirements of RAM.

Figure 5 Data overflow error under master and slave SPIF timing

5 Conclusion

In the process of LED large screen display, data is read frequently, and with the increase of display area and the richness of color changes, the requirements for data output speed are getting higher and higher. The ordinary way to read one byte of RAM data requires at least two machine cycles, that is, 24 T (clock cycle). When using SPI mode, the data output speed is determined by SPSCK (which can be set to 1/4 of f OSC at most), and the ordinary way to read RAM is only 1/24 f OSC, that is, in SPI mode, the data output speed of this LED large screen circuit can be increased by 6 times at most. By transforming the output circuit through this method, the original control system can greatly meet the requirements of high-speed data output. Although the example given in this article is based on LED large screen applications, it is also of reference significance in LCD or other systems that require high-speed data output.