PFC circuit in UPS uninterruptible power supply

1. Power factor control circuit and UC3854

⒈Definition of power factor

PFC is power factor correction. Power factor (PF) refers to the ratio of AC input active power (P) to input apparent power (S), that is, power factor

In the formula, represents the effective value of the fundamental current of the AC input mains; represents the effective value of the AC input mains current; represents the waveform distortion factor of the AC input mains current; cosφ represents the phase shift factor of the fundamental voltage and fundamental current of the AC input mains. Therefore, the power factor (PF) can be defined as the product of the waveform distortion factor γ of the AC input mains current and the phase shift factor cosφ.

It can be seen that the power factor PF is determined by the current distortion coefficient γ and the fundamental voltage and fundamental current phase shift factor cosφ. A low cosφ indicates that the reactive power of the electrical equipment is large and the energy utilization rate is low. A low γ value indicates that the input current harmonic component is large, which will cause the input current waveform to be distorted, causing pollution to the power grid. In serious cases, it will also damage the electrical equipment.

The traditional concept of power factor is obtained under the assumption that the input current has no harmonic current (i.e. I1 = Irms or γ = 1), so the definition of power factor becomes PF = cosφ.

⒉ Power factor correction implementation method

Ideally, the power factor PF = cosφ × γ = 1, but usually PF is less than 1. The function of power factor correction is to make the power factor PF of the circuit reach or approach 1. This can be achieved in two ways:

⑴ Make the input voltage and input current in phase. At this time, cosφ＝1, so PF＝γ.

⑵ Make the input current sinusoidal. That is, = (harmonic is zero), and / =1, that is; PF = cosφ×γ = 1.

Thus, power factor correction is achieved. The power factor correction technology can make the AC input current waveform completely track the AC input voltage waveform, making the input current waveform a pure sine wave and in phase with the input voltage. At this time, the rectifier load can be equivalent to a pure resistor.

In actual circuits, the PFC circuit is often set between the bridge rectifier output and the filter circuit. At this time, the reference voltage is an M-type half-wave waveform, and the input current waveform after tracking and processing by the PFC circuit is also an M-type half-wave waveform. However, as long as the waveform of the input current and the waveform of the input voltage (reference voltage) are in the same frequency and phase, the purpose of power factor correction is achieved.

⒊PFC tracking current process

Figure 1 shows a current tracking waveform. In order to facilitate explanation, the vertical axes of the waveform of the voltage Vin and the waveform of the current I in the figure are in different proportions so that they can overlap.

⑴ In Figure 1, if the waveform of voltage Vin is used as the reference, the waveform of current I is offset by a certain distance, that is, a phase difference is generated. By observing the V and I waveforms, it can be found that as long as the amplitude of the current waveform between the dotted lines JK and LM is appropriately increased according to the voltage waveform, and the amplitude of the current waveform between the dotted lines KL and MN is appropriately compressed according to the voltage waveform, the current waveform and the voltage waveform can be overlapped.

According to the same principle, even if the current waveform is a non-sinusoidal wave such as a square wave, it can be shaped into a sine wave and overlap with the voltage waveform.

In fact, when correcting the power factor, it is necessary to sample the waveform and phase of the input mains voltage, but it is not necessary to sample the waveform of the input current. Regardless of the waveform of the input current, as long as the required current waveform is transformed according to the waveform and phase of the input mains, the purpose of power factor control can be achieved. Therefore, in the actual circuit of this book, the input current is usually not sampled, making the circuit design more flexible.

⑵Figure 2 shows the schematic diagram of the PFC tracking circuit.

In the figure, BRI is the mains input bridge full-wave rectifier, L is the PFC inductor, VD is the PFC diode, C1 is the mains filter capacitor, VT is the PFC power tube, R0 is the mains current sampling resistor, the mains current sampling voltage input to the PFC control circuit is a negative value, and R1 and R2 are DC voltage sampling resistors. The PFC control circuit outputs a control signal by analyzing the mains input voltage, DC output voltage and circuit current sampling values, and controls the duty cycle of the PFC power tube, thereby achieving the purpose of correcting the circuit PFC.

As can be seen from the figure, the sampling and control circuit of PFC is set between the rectifier BRI and the filter capacitor C1. At this time, the waveform processed by the PFC circuit is an m-type half-wave waveform. If the PFC circuit is set after the filter capacitor C2, the voltage and current are already DC, and the correction is meaningless.

In the figure, VT is the PFC switch tube, and its opening and closing are controlled by the PFC controller. This circuit has the following functions:

① Improve the input power factor of the circuit

When VT is saturated and turned on, it is equivalent to grounding the right end of L. At this time, a large current will flow through L, but due to the inductance characteristics of L, iPFC can only increase gradually. Then VT is turned off, and the energy in the inductor L maintains the iPFC current to continue to flow, charging C1 through VD and supplying the load, so that iPFC gradually decreases. Under the control of the PFC control circuit, the PFC switch tube is repeatedly opened and closed to generate an output voltage at both ends of the load.

If the PFC switch tube VT is on for a long time, the current in L is large, and the energy stored in L is large, then the current maintained in L will be large when VT is turned off. On the contrary, if the VT is on for a short time, the energy stored in L will be small, and the current maintained in L will be small when VT is turned off. It can be seen that by controlling the length of the VT on time, the size of the current in the circuit can be controlled. Therefore, as long as the on and off of the PFC switch tube is controlled according to the law of the input voltage, the input current and the input voltage can be well synchronized and in phase, thereby improving the input power factor of the circuit.

②Boost

When VT is turned on, the voltage polarity across L is positive on the left and negative on the right. At this time, the positive end of VD is low and in the cut-off state, and the voltage across C2 will not be discharged through VT. When VT is turned off, the voltage polarity across L is reversed, negative on the left and positive on the right. At this time, the induced voltage across L is connected in series with the output voltage of the rectifier, and C1 is charged through VD. As a result, the voltage across C1 is higher than the voltage output by the rectifier. Therefore, this structure of the PFC circuit has a boost function.

③ Voltage stabilization

Since the voltage output by the rectifier can be controlled by controlling the duty cycle of the PFC power tube gate, the duty cycle of the PFC power tube gate can be adjusted by sampling the output voltage, thereby achieving the purpose of stabilizing the output voltage. Therefore, in a high-frequency machine with a boost structure, the power factor correction is completed while boosting the voltage.

4. UC3854

UC3854 is a special control circuit for active power factor correction produced by TI. It can complete all the control functions required for the boost converter to correct the power factor, so that the power factor reaches above 0.99 and the input current waveform distortion is less than 5%. The controller adopts the average current type control method, with high control accuracy and low switching noise. After using the power factor correction circuit composed of UC3854, when the input voltage changes between 85~260V, the output voltage can still be stable at the set value, so it can also be used as a voltage-stabilized power supply.

The output stage of UC3854 adopts a push-pull input circuit, and the output current can reach more than 1A, so the output constant frequency PWM pulse can drive high-power MOSFET devices.

⑴UC3854 internal structure diagram and pin functions

Figure 3 is the pin diagram of UC3854. The functions of each pin are:

○1GND ground terminal

The test reference point for all voltages inside the chip. The discharge current of the oscillator timing capacitor also returns from this pin, so the distance from the timing capacitor to this pin should be as short as possible.

○2PK LMT peak current limiting terminal

The peak current limit threshold is 0V. This pin should be connected to the negative voltage of the current sampling. Once the voltage of this pin is 0, the output of the chip is turned off. Usually, a bias resistor is connected between the chip's ○2 pin and ○9 pin (reference voltage output terminal) to make the ○2 pin get a positive bias voltage. If the negative voltage on the current sampling resistor is large enough to offset the bias voltage, the voltage of ○2 pin is 0V and the chip is turned off.

○3CA OUT Current error amplifier output

The current error amplifier detects and amplifies the mains input current, controls the pulse width modulator, and compulsorily corrects the mains input current.

○4ISENSE current sampling input negative terminal

This pin is the inverting input of the current error amplifier.

○5MULT OUT current sampling input positive terminal and analog multiplier output terminal

The output of the analog multiplier is directly connected to the non-inverting input of the current error amplifier.

○6IAC AC current sampling signal input

The AC current sampling signal is added from this pin to the input of the analog multiplier.

○7VA OUT voltage amplifier output

The output terminal of the voltage error amplifier. The signal output from this terminal can also be used to adjust the output voltage.

○8URMS effective value voltage input terminal

The AC rectifier output voltage is added to this pin after voltage division. The voltage of this pin should be between 1.5-3.5V.

○9VREF This pin can output a 7.5V stable voltage, with a maximum output current of 10mA, and can be internally current limited. When Vcc is low or the enable pin ○10 (ENA) is low, the voltage of this pin is 0.

○10ENA enable terminal

The input terminal of the control signal that starts the chip. This terminal also controls the reference voltage, oscillator and soft start circuit on and off. If this pin is not controlled, this pin should be connected to the +5V power supply or connected to the Vcc power supply through a 100K resistor to keep the chip in working state.

○11USENSE voltage error amplifier inverting input

The output voltage of the PFC circuit is added to this pin after voltage division. Usually, an RC compensation network needs to be added between this pin and the voltage error amplifier output terminal ○7 pin (AV OUT) to improve the frequency characteristics of the voltage error amplifier.

○12RSET oscillator timing capacitor charging current setting resistor access terminal and multiplier maximum output current setting resistor access terminal. The maximum output current of the multiplier is 3.75V/RSET.

○13SS soft start terminal

When the chip stops working or Vcc is too low, this pin is at 0 voltage. When the chip starts, the internal 14μA current charges the external capacitor, and when the voltage of this pin rises to 7.5V, the duty cycle of the PWM pulse output by the chip gradually increases, and the output voltage gradually increases.

○14CT oscillator timing capacitor access terminal

Connect a timing capacitor CT between this pin and ground, and the operating frequency of the oscillator in the chip can be set according to the following formula:

○15Vcc power supply voltage

In order to ensure the normal operation of the chip, Vcc should be higher than 17V, and a bypass capacitor should be connected between the pin and the ground.

○16GT DRV drive voltage output terminal

The output voltage of this pin drives the external MOSFET power tube. This pin has an internal clamping circuit that can clamp the output pulse amplitude at 15V, so when Vcc is as high as 35V, the chip can still work normally. When in use, a resistor greater than 5Ω should be connected between this pin and the gate of the MOSFET tube to avoid overshoot of the driving current.

⑵Internal structure diagram of UC3854

① Undervoltage control circuit

UC3854 is equipped with an undervoltage control circuit. Among them, UVIC is an undervoltage lockout circuit. When the power is turned on, if the Vcc voltage is higher than 16V, UVIC outputs a high level, otherwise UVIC outputs a low level. After UC3854 is turned on, if Vcc is lower than 10V, UVIC outputs a low level.

EC is the enable comparator. When the voltage at the ○10 pin of UC854 is higher than 2.5V, the chip starts, and when it is lower than 2.25V, the chip shuts down. The UVIC output and EC output are connected to the input of AND gate 1 respectively, and the output of AND gate 1 controls the 7.5V reference voltage generator, OSC oscillator and soft start circuit. Only when the power supply voltage Vcc of the chip is higher than 16V and the enable terminal at the ○10 pin is higher than 2.25V, the output of AND gate 1 is high, and the 7.5V reference voltage generator, OSC oscillator and soft start circuit are turned on. If Vcc is lower than 10V, or the enable terminal at the ○10 pin is lower than 2.25V, the above three circuits are immediately shut down, and the chip is shut down accordingly.

②Multiplier circuit

The multiplier is the core circuit of UC3854. Its input receives the information of the effective value of the AC input voltage and the DC voltage output by the rectifier, and the output signal is sent to the CEA current error amplifier. The output voltage of the multiplier determines the power factor of the circuit.

The output voltage signal of the circuit is sent to the inverting input of the VEA voltage error amplifier through the UC3854○11 pin. The diode is used to describe the characteristics of the relevant circuit rather than the actual component. The polarity of the output signal of the voltage error amplifier is opposite to the polarity of the circuit output voltage signal, that is, when the circuit output voltage increases, the output signal of the voltage error amplifier will decrease, and vice versa. The signal output by the voltage error amplifier is sent to the A terminal of the multiplier, so the A signal represents the output voltage of the circuit and is output from the ○7 terminal at the same time. Usually, an RC network is connected between the inverting input and output of the voltage error amplifier, that is, the ○11 pin and the ○7 pin of the UC3854, to improve the frequency characteristics of the amplifier and adjust the amplifier's gain.

The AC input voltage signal is sent to the B terminal of the multiplier via pin ○6, so the B signal represents the AC input voltage. At the same time, the AC input voltage signal is also sent to the square circuit in the chip via pin ○8, and then sent to the C terminal of the multiplier after square processing, so the C signal represents the square value of the AC input signal X.

In the multiplier, the A signal representing the circuit output voltage is multiplied by the B signal representing the input voltage signal, and then divided by the C signal representing the square value of the mains signal to obtain the Im signal. That is, the reason why A×B is divided by C is that the power factor correction value does not want to change with the amplitude of the input voltage. This is a patented technology of the UC3854 developer.

③Current error amplifier

The Im signal output by the multiplier is sent to the non-inverting input of the current error amplifier as the control current reference signal. At the same time, the mains input current signal is sent to the inverting input of the current error amplifier via pin ○4. Therefore, the output signal of the current error amplifier has the opposite polarity to the mains input current signal.

④Oscillator circuit

The oscillation frequency of the OSC oscillator is given by

The oscillation frequency is usually selected to be 20-40KHz.

The output of the oscillator is a sawtooth wave and a square wave of the same frequency, of which the sawtooth wave is sent to the non-inverting input of the PWM comparator, while one path of the square wave is sent to the set terminal S of the trigger and the other path is sent to the input of inverter 2.

⑤Peak current limit comparator

The output current signal is added to the inverting input terminal of the comparator, and the output signal of the comparator is added to a reset terminal R of the trigger. When the output current peaks, the comparator outputs a low level, forcing the trigger to stop working.

⑥PWM pulse width modulation circuit

The PWM pulse width modulation circuit is composed of a PWM comparator. The sawtooth wave is sent to the non-inverting input of the PWM comparator, and the signal output by the current error amplifier is sent to the inverting input of the PWM comparator. The PWM pulse width modulation circuit can output continuous PWM modulation pulses. The PWM pulse output by the PWM pulse width modulation circuit is sent to a reset terminal R of the trigger circuit.

⑦Trigger circuit

The square wave pulse signal output by the oscillator is added to the set terminal S of the trigger circuit, and the PWM signal output by the PWM pulse width modulation circuit is added to the reset terminal R of the trigger circuit. Under the joint action of the two input signals, the trigger output terminal Q will output a series of signals with the same frequency as the sawtooth wave and the same width as the pulse width of the output signal of the PWM pulse width modulation circuit. Under the joint action of the pulse signal output by gate 2 at the trigger Q terminal and the reverse polarity square wave signal output by the inverter, a width-controlled PWM signal is output, which is then power amplified by the push-pull output stage inside the UC3854 and output from pin ○16.

(4) Characteristics of the PWM pulse voltage output by UC3854:

①The pulse is modulated by the frequency and amplitude of the input mains. After being controlled by the PFC power tube, the waveform of the input current can closely follow the waveform of the input voltage, thereby achieving the purpose of improving the power factor of the input circuit.

②The width of the pulse is controlled by the modulation of the input AC voltage signal and the output voltage signal of the rectifier circuit. While improving the power factor of the circuit, it can also make the DC voltage output by the rectifier have the characteristics of boosting and stabilizing.

2. PFC circuit in SANTAK-1053 high frequency machine

Figure 5 shows the circuits related to PFC of the SANTAK-1053 high frequency machine. The PFC circuit of the machine consists of chip U11 (UC3854), PFC MOSFET power tube Q14 (2SK1723), PFC driver optocoupler U10 (OPT250-1), operational amplifier U9 (LM324) and peripheral components.

As can be seen from Figure 5:

⒈ The mains phase voltage is stepped down by R71, R83, and R82 and then added to the reverse input terminal of the operational amplifier U9C (LM324). U9C and D39 form a precision detector to detect the stepped-down mains voltage to form a mains detection voltage, which has an m-shaped half-wave waveform. The use of a precision detector can achieve good detection linearity for small signals. The mains detection voltage is then isolated by the follower U9A (LM324) and sent to the ○6 and ○8 pins of U11 (UC3854).

⒉ After the mains input current flows through CT2, an AC voltage is induced at pins ○1 and ○4. After full-wave rectification by D41, D42, D45, and D46, an input current detection voltage is formed and added to pins ○2 and ○5 of U11 (UC3854). The function of this circuit is that once the input current is overcurrent, the PFC chip stops working. It should be noted that the voltage added to pins ○2 and ○5 of U11 is the negative voltage output by the full-wave rectifier.

⒊ The starting voltage from the ○57 pin of the computer chip U6 is added to the ○10 pin of U11. A high level means starting and a low level means shutting down.

⒋ The PWM drive signal is output from the ○16 pin of U11, which is isolated and driven by the optocoupler U10 (OPT250-1) and then output from the ○6 and ○7 pins to the gate of the PFC power tube Q14. The acceleration and vibration elimination circuit composed of R52 and D36 is connected in series in the gate. R52 is a vibration elimination resistor, which consumes the self-excited oscillation that may be generated by the gate; D36 is an acceleration diode. When the positive polarity drive signal arrives, D36 is turned off and has no effect on the circuit; when the negative polarity drive signal arrives, D36 is turned on, bypassing R52, so that the charge of the gate of Q14 can be quickly discharged.

⒌ The ​​detection voltage of ±BUS voltage is isolated and shaped by BUS voltage switching switch SW, R120, R122, R123, C74, D43, etc. and then added to U11's ○7 pin as the ±BUS error correction voltage. C66 is added between U11's ○7 and ○11 pins as the frequency compensation capacitor of U11's internal voltage error amplifier to improve its frequency characteristics.

In the inverter state, U1 obtains the amplitude information of the ±BUS voltage through the ±BUS voltage switching switch SW, controls the duty cycle of the output PWM pulse, and realizes the stability of the ±BUS voltage. In the mains state, although the inverter circuit has stopped working, the ±BUS voltage switching switch SW is still in the working state, and the amplitude information of the ±BUS voltage can be sent to the PFC circuit U11.

In this way, when the circuit works in the AC power state, there are two detection signal inputs at the input end of the internal multiplier of U11: one is the AC power detection voltage sent by the precision detectors U9C and U9A through pins ○6 and ○8; the other is the ±BUS detection voltage sent by the voltage switching switch SW through pin ○7. After processing these two signals, U11 outputs a PWM signal from pin ○16 to control the duty cycle of the PFC power tube Q14, and at the same time realizes power factor correction, ±BUS voltage boost and voltage regulation.

⒍As mentioned above, the PFC circuit is usually set between the full-wave rectifier and the filter capacitor, and processes the m-type half-wave voltage. In the SANTAK-1053 high-frequency machine, the PFC circuit is set between the mains input and the full-wave rectifier circuit, and processes the sinusoidal voltage. A rectifier REC1 for polarity correction is connected between the power tube and the mains input control point. This structure is obviously different from the usual PFC circuit.

According to the usual PFC circuit settings, it is inconvenient for the PFC circuit to generate positive and negative polarity BUS voltages. In the SANTAK-1053 high-frequency machine, the PFC circuit is set between the mains input and the full-wave rectifier circuit, and a polarity correction rectifier bridge is connected between the power tube and the mains input control point, so that this problem is solved.

Figure 6 is a diagram showing the formation of the PFC current of the SANTAK-1053 high frequency machine. When the mains is in the positive half cycle, the mains current forms a loop through D1, D4, Q14/D, and Q14S. When the mains is in the negative half cycle, the mains current forms a loop through D2, D3, Q14/D, and Q14S. Therefore, no matter in the positive or negative half cycle of the mains, there is a PFC current flowing through Q14, and it flows in from the D pole and out from the S pole. In this way, this PFC circuit processes the full-wave voltage, and it is very convenient to obtain a positive and negative symmetrical BUS voltage.

3. PFC circuit in SANTAK-C3K(S) high frequency machine

⒈Structure of PFC circuit of SANTAK-C3K (S) machine

Figure 7 shows the PFC circuit diagram of the SANTAK-C3K (S) machine.

The PFC circuit in the SANTAK-C3K (S) machine is quite different from that in the SANTAK-1503 machine in structure:

⑴ In the SANTAK-C3K (S) machine, the PFC control circuit does not use common PFC chips such as UC3854, but uses the common switching power supply PWM chip UC3843.

⑵ In the SANTAK-C3K (S) machine, the basic structure of the PFC control tube circuit is similar, but because the output power is larger, the PFC control tube Q09 uses an IGBT tube, but the PFC signal circuit is quite different.

⑶ In the SANTAK-C3K (S) machine, the main PFC circuit is made on two small circuit boards and vertically soldered on the main circuit board.

⒉ Waveform conversion circuit

See Figure 7. The function of the PFC circuit is to generate corresponding control pulses according to the amplitude changes of the AC power and ±BUS voltages, and adjust the AC input current (when the AC power is working) and the ±BUS voltage (when the battery is working) through the PFC power tube.

The CPU outputs the corresponding square wave pulse train from pin ○34 according to the detected AC input voltage and input current as well as ±BUS voltage data. The pulse width in the pulse train is variable, representing the control information of the CPU. However, the subsequent PFC control circuit cannot directly process the voltage waveform with constant amplitude and variable width (cycle), and must convert it into a voltage waveform with variable amplitude. For this reason, the pulse train output from pin ○34 of the CPU is added to the second-order filter composed of U22B and peripheral components. After coming out of the second-order filter, it becomes a sine wave signal, and its amplitude change represents the control information of the CPU.

⒊PFC small board

⑴Composition and function of PFC board

The PFC board consists of U401, U402, Q401, Q402 and peripheral components, as shown in the lower left of Figure 7.

The signal output by the second-order filter is added to the base of transistor Q402 through connectors CN1/1 and CN10/1. The base of Q402 is connected to a voltage divider composed of R401 and R412, which divides the +5V voltage by about 0.5V to the base of Q402. Therefore, when the voltage output by the second-order filter exceeds 0.5V, Q402 is saturated, and the U401○1 pin is grounded, so U401 is turned off, and the PFC power tube connected to the output terminal ○6 pin is also turned off. When the voltage output by the second-order filter is lower than 0.5V, Q402 is cut off, U401 is turned on, and the PFC power tube connected to the output terminal ○6 pin is also turned on. When the output voltage amplitude of the second-order filter changes, the opening time of U401 also changes accordingly.

From the above process, it can be seen that the change of the CPU output pulse width becomes the change of amplitude in the second-order filter, and after passing through U401, it becomes the change of the turn-on and turn-off time of the PFC power tube, thus realizing the CPU's control over the PFC power tube.

⑵PFC overcurrent protection

The instantaneous current flowing through the PFC power tube is of the same order of magnitude as the input current of the mains. Once out of control, it will cause damage to the circuit components. For this reason, a PFC overcurrent protection circuit is set up.
The PFC overcurrent protection circuit consists of a PFC overcurrent detection sensor CT2 and peripheral components. The primary of CT2 is connected in series in the PFC power circuit. When the PFC circuit is working, the voltage induced by the secondary is filtered by D24, R408, and C406 and added to the ○3 pin of U401. Once an overcurrent occurs in the PFC circuit, U401 is turned off. R88 is a load resistor. D40 is not filtered after rectification, which retains the surge part in the waveform, making the protection more sensitive.

⑶PFC circuit shutdown

When the PFC circuit needs to be turned off, the CPU pin ○35 outputs a high level, which is added to the U401 pin ○2 through R305, connectors CN1/7, CN12/2, R406, and R410, turning U401 off. At the same time, the shutdown signal sent by the CPU pin ○35 is also sent to the inverting input pin ○2 of the comparator U402A through R305. As long as the voltage of pin ○2 exceeds the voltage of pin ○3, the output pin ○1 of U402A is low level, turning U401 off. Since the PFC circuit adopts double shutdown measures, the shutdown is very reliable.

⑷ Slope compensation

In order to ensure that the switching power supply can work stably when the duty cycle is greater than 50%, the circuit needs to be slope compensated, and its principle is as described above. The slope compensation of this machine still uses the method of superimposing the charging and discharging waveform of the timing capacitor with the current sampling voltage waveform, as shown in Figure 7.

In the figure, Q401 is a slope compensation transistor. The emitter of Q401 is connected to the +5V stable voltage provided by U401○8 pin. The base is connected to U401○4 pin. The emitter of Q401 is connected to U401○3 pin through resistors R411 and R403. Obviously, Q401 is connected in the form of an emitter follower, and the charge and discharge waveform of C401 is sent to the base of Q401, and superimposed with the current sampling voltage sent to U401○3 pin by the power tube. Therefore, the amplitude of the two curves after superposition is greatly increased, and the slope of the entire curve increases. The slope curve close to the trigger level before compensation is gentle, and the slope curve close to the trigger level after compensation is rapidly rising. The interference pulse with the same amplitude at the same position can no longer cause the switching power supply to be cut off early, thereby effectively ensuring the stable operation of the switching power supply.

4. Driver board

In the SANTAK-C3K (S) machine, the inverter drive circuit and the PFC drive circuit have the same structure, and are collectively referred to as the drive circuit. The drive circuit is made on a small board, called the drive board, and is labeled DUR/MODULE. The schematic diagram of the drive board is shown in the lower right of Figure 7.

In the driver board, the switching power pulse sent from the secondary of the switching power transformer TX201 on the main board is sent to the primary of the switching transformer TX700 in the driver board through the connectors CN13/1 and D700. The secondary voltage is rectified by D701, filtered by C703 and C704, and stabilized by ZD702 and ZD703 to generate the positive and negative driving voltages required to drive the triode. The positive driving voltage is added to the collector of the upper driving tube Q702, and the negative driving voltage is added to the collector of the lower driving tube Q703. The common point of the positive and negative driving voltages, that is, the 0 point, is output through the connector CN13/9 as the reference point of the output signal.

The U701 (TLP250) in the figure not only ensures the reliable isolation between the power drive circuit and the PWM pulse width modulation circuit, but also has the ability to directly drive MOSFET, thus simplifying the drive circuit.

TLP250 is a dual in-line 8-pin package. Pins ○1 and ○4 are empty. Pin ○2 is the positive electrode of the internal light-emitting diode, and pin ○3 is the negative electrode of the internal light-emitting diode. Pin ○8 is the collector of the internal upper drive tube, and pin ○5 is the collector of the internal lower drive tube. Pin ○6 is the output terminal.

In the figure, R707 is a vibration damping resistor, which eliminates the self-excited oscillation factor in the circuit. R708 and R709 are self-supplied negative bias resistors. When the upper drive tube is saturated and the lower drive tube is cut off, R708 and R709 can lower the emitter potential of the lower drive tube, making the base potential higher than the emitter potential, so that the lower drive tube can be reliably cut off. Similarly, when the upper drive tube is cut off and the lower drive tube is saturated, R708 and R709 can raise the emitter potential of the upper drive tube, making the base potential lower than the emitter potential, so that the upper drive tube can be reliably cut off.

In the figure, U701○3 pin is grounded through connectors CN13/4, CN10/5, and R409. U701○2 pin is connected to U401 output pin○6 on the PFC board through connectors CN13/3 and CN10/6. When U401○6 pin is low level, the internal light emitting diode is cut off, U701○6 and ○7 pins output high level, the upper drive tube is saturated, the lower drive tube is cut off, and the output of the driver board outputs high level through connector CN13/9. When U401⑹ pin is high level, the internal light emitting diode is turned on, U701○6 and ○7 pins output low level, the upper drive tube is cut off, the lower drive tube is saturated, and the output of the driver board outputs low level through connector CN13/9.

At this point, the signal output by the driver board through the connector CN13/9 has undergone a series of changes and has returned to the pulse train with constant amplitude and varying width output by the CPU ○34 pin.

5. PFC circuit of SANTAK-C3K (S) machine

As can be seen from Figure 7, the AC phase line enters the full-wave rectifier filter circuit composed of D16, D17, C36, C38, C37, and C39 through the PFC inductor L06. The PFC circuit only controls the size of the AC current and does not cut off the AC power path, which does not affect the basic function of the rectifier circuit.

The PFC control voltage output by the driver board is sent to the gate of the PFC switch tube Q09. Since the output power of the SANTAK-3CK (S) machine is relatively large, the PFC tube Q09 uses an IGBT tube. D20 is the acceleration diode of Q09, which allows the base charge to be quickly discharged when Q09 is turned off. R67 can limit the size of the discharge current. R208 and R66 are damping resistors of Q09 to prevent possible self-excited oscillation of Q09. R65 is a negative gate voltage resistor. When Q09 is turned off, the driver board outputs a negative voltage, and the current is from Q09 S pole → R65 → Q09 G pole. A voltage of positive S terminal and negative G terminal is generated on R65, which pulls the G pole of Q09 negative, causing Q09 to be deeply turned off, eliminating the possibility of mis-conduction. C59 and R126 form the absorption circuit of Q09 and the rectifier module REC02 to avoid damage caused by spike voltage.

REC02 in the figure is a bridge rectifier module, which plays a role in polarity correction. It can ensure that the PFC current flows from the D pole to the S pole of Q09 regardless of whether it is the positive half cycle or the negative half cycle of the input mains. The formation of the PFC current is shown in Figure 6.

Since the PFC inductor L06 is connected in series in the mains input circuit, the current flowing through L06 can be controlled by controlling the width of the pulse sent to the gate of Q09, so that it can keep good tracking with the input mains voltage waveform. At the same time, it is precisely because L06 is connected in series in the mains input circuit that the voltage sent to the full-wave rectifier circuit composed of D16 and D17 can be higher than the mains voltage, and the DC voltage obtained after rectification and filtering is also improved. We know that under normal circumstances, after full-wave rectification and filtering, only about 310V DC voltage can be obtained. In the C3K (S) machine, after the PFC circuit boosts, a DC voltage of about 400V can be obtained. After the two sets of filter capacitors are connected in series, a ±400V ±BUS voltage can be obtained, which is equivalent to the DC voltage output by the boost circuit.

In actual operation, the input AC voltage amplitude may fluctuate, which will cause the ±BUS voltage to fluctuate. In order to ensure the stability of the ±BUS voltage when the circuit is working under AC power, the CPU will detect the ±BUS voltage in real time, and adjust the pulse width output by the CPU ○34 pin according to the change of the ±BUS voltage amplitude, thereby adjusting the size of the PFC current, and finally making the ±BUS voltage stable.