Abstract: When the motor capacity is large, the impact of the input harmonics of the high-power inverter on the power grid and the impact of the output harmonics on the motor become prominent problems in the AC frequency conversion system. In order to reduce the harmonics of the high-power inverter, multi-pulse rectification, transformer coupling output, multi-level and unit cascade technology are generally used, forming a high-power inverter main circuit with a multi-pulse rectification topology or a multi-level topology as the input stage and a transformer coupling output or a multi-level output topology as the output stage, as well as a high-power inverter main circuit with a multiple structure. This paper analyzes several representative high-voltage inverter main circuit topologies and input and output harmonics, and compares them with the IEEE-519 standard to study the harmonic characteristics of the inverter.
Keywords: multiple multi-level unit cascade transformer coupling output
1 Introduction
Since the variable frequency speed regulation scheme of high-power fans and pumps can achieve significant energy-saving effects and have significant economic benefits, the research on high-voltage and high-power variable frequency speed regulation technology has developed into one of the leading directions of energy-saving in various countries. Power electronic converter circuits are still the core of frequency conversion technology. Since power electronic devices all work in the switching state, the devices composed of these circuits have become the main harmonic source in the power system. The harmonic current output by the inverter will cause resonance and harmonic current amplification, endangering rotating motors and transformers, affecting relay protection and
power measurement
accuracy. In recent years, around the suppression of harmonic currents, researchers have proposed different rectification and inversion schemes in terms of circuit structure and control technology, forming a variety of high-power frequency conversion technologies. Please log in to: Power Transmission and Distribution Equipment Network for more information.
This paper systematically summarizes the structure of high-voltage and high-power inverters, studies the harmonic suppression principles of various inverters, deeply analyzes the input and output harmonics of high-voltage and high-power inverters, and conducts comparative studies based on IEEE-519 regulations, providing a reference for the selection of inverters.
2 Introduction to Harmonic Suppression Standard (IEEE-519)
In order to limit the harmonic interference of converters and nonlinear loads to power systems, countries around the world and related organizations have formulated relevant standards to ensure the power supply quality of the power grid. The most authoritative of these is IEEE-519, which was developed by the Institute of Electrical and Electronics Engineers (IEEE) and is used as the American National Standard (ANSI). This standard analyzes in detail the causes and effects of waveform distortion; determines the parameters for determining the degree of distortion; establishes limits on waveform distortion in power systems; introduces analysis methods and control measures for waveform distortion, etc. It has a guiding role for engineering and technical personnel engaged in the development and application of high-power variable frequency speed regulation systems.
The limits in IEEE-519 are all "worst" conditions proposed for steady-state operation of the system, and situations exceeding this standard are allowed during transient processes. Table 1 lists the IEEE-519 limit standards for voltage harmonics.
Table 1 IEEE-519 limit standards for voltage harmonics
Table 2 lists the limits of harmonic current values and total harmonic distortion (THD) values under different short-circuit ratios (short-circuit ratio SCR is defined as the ratio of maximum short-circuit current IS to average set maximum load current IL) in power supply systems below 6.9kV, and even harmonics are limited to less than 25% of odd harmonics. Therefore, it is very important to correctly select the main circuit connection form (equivalent number of phases, number of pulses) and control method according to the ratio of power electronic device capacity to power system short-circuit capacity.
Table 2 IEEE-519 limit values for current harmonics
3 Analysis of input harmonics of high-voltage inverters
3.1 Basic principles of multi-pulse rectification to suppress input harmonics
The multiple phase shift superposition technology was proposed by A. Kernick et al. as early as 1962. This technology uses 6-pulse three-phase full-wave rectification (or equivalent three-phase full-wave rectification) with a pulsation width of 60° as the basic unit, so that the AC side voltage of m groups of rectifier circuits is sequentially phase-shifted by α=60°/m, and a multi-pulse rectification with a pulsation number of p=6m can be formed. The relationship between the pulsation number p, the number of groups m, the phase shift angle α and the corresponding harmonic number h is shown in Table 3.
Table 3 Composition of multi-pulse rectification
For 12-pulse rectification, the rectifier transformer is a conventionally connected Y/Y-12 (or Δ/Δ-12) and Y/Δ-11 or (Δ/Y-1), and the secondary voltages on the AC side of the two are phase-shifted by 30°, and the DC side is connected in parallel (or in series) to form a 12-pulse rectification.
For rectification of 18 pulsations and above, the windings of the rectifier transformer are realized by zigzag connection (Z connection), and each rectifier unit is connected in parallel (or in series) to supply power to the load together. As long as the voltage U(n) (n=1,2,……,m) on the AC side of the m groups of 6-pulse rectification is phase-shifted by α=60°/m in sequence, a multi-phase rectification with p=6m pulsations can be obtained. The specific transformer group selection is shown in Table 4.
3.2 Simulation analysis of multi-pulse rectifier input harmonics
The multi-pulse rectifier simulation is studied using the Simulink/Power System toolbox in Matlab. This paper constructs a unified analysis module for multiple rectifiers. After setting the parameters, it can realize the working characteristics of 12, 18, 24, 30, and 36 pulsation rectifier circuits. According to the relevant instructions in the parameter panel, select the appropriate transformer connection method and enter the phase shift angle to realize the simulation analysis of multiple rectifiers with the corresponding number of pulsations. The parameter setting panel of the multi-pulse rectifier input simulation circuit is shown in Figure 1.
Figure 1 Dialog box for setting parameters of multi-pulse rectifier simulation circuit
Taking the simulation of 12 pulses as an example, the waveform and spectrum are shown in Figure 2. It can be seen that the main harmonics of 12 pulses are 12k±1, which is consistent with the theoretical analysis.
Figure 2 12-pulse rectification waveform and spectrum Source: Power Transmission and Distribution Equipment Network
Combined with the standards in IEEE-519, the rectification of each pulse number is compared as shown in Table 5. It can be seen that without adding other filtering devices, 12-pulse rectification can meet the requirements of IEEE-519, and the harmonic content exceeds the standard in all ranges. The situation of 36 pulses is much better. The harmonics and THD below 35 can meet the requirements of IEEE-519, but it still contains large harmonics of 35 and 37.
From the analysis, it can be seen that multi-pulse rectification solves the harmonic suppression problem at the input end of the inverter very well, especially the suppression effect on low-order harmonics is obvious, and the input waveform is approximately sinusoidal, which meets the requirements very well. However, compared with the standard in IEEE-519, without adding other filtering devices, multi-pulse rectification cannot meet the requirements in IEEE-519 on all harmonics, and the influence of high-order harmonics is still very obvious, and it needs to be used in conjunction with other filters.
4 Analysis of harmonics of high-voltage inverter output
As the output link of high-voltage and high-power inverters, high-performance inverters are the guarantee of their performance. However, high-voltage and high-power inverters do not have mature and unified technologies like low-voltage inverters. Various topologies and control schemes have their own advantages and disadvantages.
4.1 Transformer-coupled output inverter output harmonic analysis
In 1999, Cengelci E et al. proposed this topology. The main idea is to superimpose the outputs of three conventional two-level three-phase inverters composed of high-voltage IGBTs or IGCTs through a transformer to achieve high-quality three-phase high-voltage output and low dv/dt PWM waves, and to ensure balanced operation. The utilization rate of each three-phase inverter is close to 100%. These characteristics make it particularly suitable for driving constant torque and variable torque loads. In addition, these three conventional inverters can adopt the control method of ordinary low-voltage inverters, which greatly simplifies the circuit structure and control method of the inverter. This structure is shown in Figure 3.
Figure 3 Transformer-coupled output inverter topology
The transformer-coupled output inverter only needs three independent three-phase inverters to generate medium and high voltage outputs. During operation, each inverter is parallel and provides 1/3 of the output power, so it is convenient for the high-voltage system to use low-voltage IGBT devices. This balanced operation state also makes it unnecessary for the DC side capacitor to store too much energy. The existence of the output transformer is conducive to generating a higher output voltage and can eliminate the circulating current between inverters.
The simulation waveform and spectrum of this structure in Matlab are shown in Figures 4 and 5.
Figure 4 Output voltage and spectrum of transformer-coupled output inverter
Figure 5 Output current and spectrum of transformer-coupled output inverter
4.2 Multi-level inverter
A. Nabae et al. of Nagaoka University of Science and Technology in Japan proposed a three-level inverter in 1980, also known as a neutral point clamped (NPC) inverter. After years of research, two main topologies have emerged: diode clamped; flying capacitor. The diode clamped topology is shown in Figure 6.
Figure 6 Three-level inverter topology Source: Power Transmission and Distribution Equipment Network
Compared with the traditional two-level topology, the midpoint clamped three-level inverter is more suitable for the high voltage and large capacity of medium and high voltage frequency conversion devices. The special topology enables the device to have a forward blocking voltage capacity of 2 times. Its multi-layer ladder output voltage can theoretically make the output voltage waveform close to sine by increasing the number of levels, reducing harmonics. Under the same output performance indicators, the switching frequency of the three-level will be 1/5 of the two-level, thereby reducing system losses. As the number of levels increases, the amplitude of each level decreases relatively, dv/dt becomes smaller, the pulsating component contained in the main circuit current decreases, and the torque pulsation and electromagnetic noise are effectively suppressed. Although the
three-level inverter has a simple structure and can achieve four-quadrant operation, it can only reach medium and high voltages such as 4.16kV due to the current device withstand voltage level. If a higher voltage is to be output, the device series method must be used, but it will bring problems such as voltage balancing.
Figures 7 and 8 are the output voltage and current waveforms and their spectrum of the three-level inverter.
Figure 7 Line voltage waveform and spectrum
Figure 8 AC side current waveform and spectrum Please log in: Power Transmission and Distribution Equipment Network for more information
4.3 Multiple inverters
The unit cascade multiple structure is the promotion and application of multiple technology and is a type of multiple frequency converter. As shown in Figure 9, the unit cascade multiple frequency converter uses a number of low-voltage PWM frequency conversion power units in series to achieve direct high-voltage output. The increase in the number of levels effectively suppresses the output harmonics. Since each power unit module contains not only the inverter output structure but also the rectification function, the multiplexing of the rectification part is realized accordingly, so that the input and output harmonic suppression of the frequency converter is completed synchronously. Its harmonic suppression principle is similar to that of ordinary multiplexing, and it also uses phase shift technology to eliminate certain sub-output harmonics of each power module by staggering them at a certain angle.
Figure 9 Unit series multiple inverter Please log in: Power Transmission and Distribution Equipment Network to browse more information
Although it is a series structure, there is no voltage balance problem because the DC side uses separate DC power supplies. Without the restriction of diodes and capacitors, the number of levels of the series structure can be larger. Generally, diode and capacitor clamping types are limited to 7 or 9 levels, while the series structure has no such restriction. Since the structure of each inverter bridge is the same, it is convenient for modular design and manufacturing.
However, due to the large number of power units and power devices used, taking three units in series per phase as an example, a 6kV system needs to use 90 power devices (54 diodes, 36 IGBTs), the size of the device is too large, and the installation position becomes a problem.
The simulation waveform and spectrum of this topology in Matlab are shown in Figures 10 and 11.
Figure 10 Output voltage and spectrum of unit cascade multiplexing
Figure 11 Unit cascade multiple output current and its spectrum Source: Power Transmission and Distribution Equipment Network
The ratios of the main subharmonics to the fundamental content of the three inverter structures are shown in Tables 6 and 7. All data are obtained by Matlab/Simulink simulation without additional filtering devices. Combined with the standards in IEEE-519, a comparative analysis is performed. The transformer-coupled output inverter can basically meet the requirements of IEEE-519, especially the harmonic content below the 23rd order is completely less than the value specified in IEEE-519, but due to the influence of the PWM carrier ratio, large harmonics appear near the 23rd and 25th orders. The three-level inverter can also basically meet the requirements of IEEE-519, and the low-order harmonics do not exceed the standards. The unit cascade multiple inverter has the best performance and meets the requirements of IEEE-519 very well. The harmonic content in all ranges does not exceed the standards. In terms of total harmonic distortion, the three output structures all meet the requirements of the IEEE-519 standard.
The three topologies have their own advantages and disadvantages, but they all solve the problem of suppressing the output harmonics of the inverter well, making the output waveform closer to sine. By comparing with the IEEE-519 standard, it is found that without installing other filtering links, the unit cascade multiple inverter has the best effect and fully meets the provisions of IEEE-519. In addition, other structures cannot fully meet the limit values in the standard and need to work with the assistance of a certain capacity of filtering links.
5 Conclusion
With the widespread application of high-voltage and high-power inverters, improving their topological structure to effectively suppress and reduce the generation of harmonics on the AC side has become the goal pursued by engineers. As a topological structure commonly used on the rectifier side of the inverter, the multiple structure can meet the needs of different occasions and different voltage levels. However, when the number of multiples increases, although the harmonic suppression effect is obvious, the structure of the device is complex and the transformer loss increases, so 12 and 18 pulsation structures are generally used. In this way, as long as a small capacity filter is added, the requirements of IEEE-519 can be well met.
On the inverter side, the input and output harmonic suppression effect of the unit cascade multi-level structure is the best, but the system structure is complex, the number of devices is large, and the volume is large. The three-level structure is simple and requires the least number of devices, but the harmonic suppression effect is slightly poor due to the limitation of the number of levels, and there is a problem of midpoint potential balance, which is also one of the factors that hinder the harmonic suppression effect. Implementing NPC on the rectifier side can solve this problem. The transformer-coupled output structure can meet the needs of high voltage and high power while using the current withstand voltage level devices. It has a simple structure and a relatively small number of devices. The harmonic suppression effect is between the above two structures. It is a compromise solution.
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