Digital power supply realizes system low power consumption design

Publisher:未来画家Latest update time:2011-12-22 Source: 互联网 Reading articles on mobile phones Scan QR code
Read articles on your mobile phone anytime, anywhere

The continuous improvement of semiconductor design and manufacturing process technology has made the devices on the circuit board run faster and smaller. The goal of digital power is to integrate power conversion and power management into a single chip using digital methods to achieve power conversion, control and communication. Digital power is not more efficient than traditional analog power and is generally more expensive. Currently, digital power requires large filters, which makes it less efficient than analog power.

This article introduces a method of using a simple digital power supply to achieve low-power system design on an embedded digital signal processor (DSP) OMAP5912 . TI's power conversion and voltage monitoring chip TPS65010 is used to detect various states of the DSP system. Different supply voltages are output in different states to reduce the supply current and achieve low-power operation of the entire system. This design method is suitable for various handheld electronic devices with low power requirements.

1 TPS65010 and OMAP5912

TPS65010 is a power and battery management chip for lithium-ion power supply systems launched by TI. TPS65010 integrates two switching power converters Vmain and Vcore, two low-voltage dropout power converters LD01 and LDO2, and a single lithium-ion battery charger, which is very suitable for the application requirements of handheld electronic devices. When the 12 V DC power adapter is turned on, the chip does not need a switching circuit. In actual use, Vmain can provide a voltage of 2.5 to 3.3 V, Vcore can provide a voltage of 0.8 to 1.6 V, and LD01 and LDO2 can provide a voltage of 1.8 to 6.5 V. The current under different voltages can generally reach 400 mA, which meets the needs of most handheld devices. Various registers of TPS65010 can be set through the I2C bus, and important information can be notified to TPS65010 through common pins. For example, the LOW_POWER pin can be used to make TPS65010 output the operating voltage in low power mode.

OMAP5912 is an embedded DSP launched by TI. It has a dual processor structure and integrates ARM and C55 series DSP processors. The TI925T processor is based on the ARM9 core and is used to control peripheral devices. The DSP is based on the TMS320C55 X core, which is used for data and signal processing and provides a 40-bit and a 16-bit arithmetic logic unit (ALU). Since the DSP uses a dual ALU structure, most instructions can run in parallel, the operating frequency reaches 150 MHz, and the power consumption is lower. C55 and ARM can be simulated jointly or separately.

The OMAP5912 is equipped with an ultra low power device (ULPD). The internal structure of the ULPD module is shown in Figure 1.

As can be seen from Figure 1, the ULPD module is mainly composed of a reset manager, a FIQ manager, and a sleep mode state machine. The on-chip ULPD is connected to the reset generation module inside the OMAP5912 chip, as well as the chip IDLE and wake-up state controller. The reset manager of the off-chip ULPD is responsible for detecting power-on reset and manual reset, and outputting the reset signal inside the chip; the FIQ manager is specifically used to detect the battery voltage. Once the battery voltage is lower or higher than the system requirement, or the battery power quality is not high (large ripple, large overshoot, large instantaneous pulse), etc., the FIQ manager will interrupt the system operation; the sleep mode state machine is responsible for detecting and outputting different working modes, and will provide different voltages and currents in different working modes, thereby reducing system power consumption. There are 3 sleep modes: normal working mode, Big Sleep mode, and Deep Sleep mode.

2 System Hardware Structure

The relatively complete handheld device system is mainly composed of OMAP5912, TPS6501O, AD/DA, LCD, SDRAM, human-machine interface and Flash. Its hardware connection is shown in Figure 2. In the figure, DSP is the core control unit; AD is used to collect analog signals and convert them into digital signals; DA converts digital signals into analog signals; the human-machine interface mainly includes the keyboard interface. Flash saves the programs required by DSP for DSP to call when it is powered on. In addition, the HPI interface of DSP is used to connect to the PC.

3 Hardware Design of TPS65010 and OMAP5912

The connection between TPS65010 and OMAP5912 is the key to realize the low power design of the system. The specific hardware connection is shown in Figure 3. TPS65010 can provide various voltages required by OMAP5912, but the CVDDA required by the core computing unit and the DVDD4 required by important peripherals are converted from the Vmain voltage by TPS76201. The specific hardware connection of TPS76201 is shown in Figure 4. TPS76201 converts the 3.3V voltage of Vmain into 1.6 V and provides it to OMAP. As long as the voltage of Vmain is not lower than 1.8 V, TPS76201 will stably output 1.6 V voltage to ensure that the core computing unit and important peripherals of OMAP have stable power supply under any circumstances, even in deep sleep state. Note that if the low power design of the OMAP system is not required, CVDDA and DVDD4 can be directly connected to Vcore.

The Vcore of TPS65010 outputs 1.6 V voltage to other cores of OMAP. The voltage of these cores can be reduced to 1.1 V in low power state. The VLDO1 and VLDO2 of TPS65010 output 2.75 V voltage to other peripherals of OMAP. There is a certain voltage difference between these voltages and the conventional 3.3 V, but it does not affect data transmission. In general, the high level only needs to reach above 2 V; in low power state, VLDO1 and VLDO2 are reduced to 1.1 V. Using two LDOs to provide voltage to different peripherals is to shut down some peripherals in Big Sleep state and enable other peripherals at the same time. If low power design is not performed, the same LDO can be used to provide voltage.

The I2C bus of TPS65010 is connected to OMAP, so that OMAP can set the registers of TPS65010. The RESPWRON pin of TPS65010 is connected to the Power_Reset pin of OMAP, and TPS65010 resets OMAP after power-on reset; the LOWPWR pin of TPS65010 is connected to the LOW_PWR pin of OMAP, and OMAP enters the low power state through this pin to notify TPS65010, and TPS65010 reduces the various set voltages, thereby reducing system power consumption.

4 Low power consumption software design of OMAP5912

OMAP5912 has three working modes, namely normal working mode, Big Sleep mode and Deep Sleep mode. In normal working mode, all internal clocks, external clocks and pins are enabled. At this time, the system power consumption is the highest, and TPS6501O is also powered in normal working mode. In low power mode, it is always determined whether there is a chip IDLE request, and if so, it enters Big Sleep mode. In Big Sleep mode, it is further determined whether there is an external clock request, and enters Deep Sleep mode according to the situation.

In the normal working mode of the system, if low power design is not required, the above software does not need to be added to the application. When low power design is performed, it is necessary to judge the various working states of OMAP, and add software codes such as LOW_PWR signal enable, shut down DSP core, activate and set wake-up event, shut down ARM core, activate and set deep sleep, etc. to the application.

5 Conclusion

OMAP adjusts the working mode at any time according to its own software running status and notifies TPS65010, so that the software and hardware can communicate with each other in low-power design. This design method is suitable for various electronic devices with high power consumption requirements.

Reference address:Digital power supply realizes system low power consumption design

Previous article:Several "fatal weaknesses" of high-frequency UPS are worth discussing (Part 2)
Next article:TDA8902J digital power amplifier circuit and anti-interference design

Latest Power Management Articles
Change More Related Popular Components

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号