Data acquisition systems and programmable logic controllers (PLCs) require versatile, high-performance analog front ends to interface with a variety of sensors to accurately and reliably measure signals. Depending on the specific type of sensor and the voltage/current amplitude to be measured, the signal may need to be amplified or attenuated to match the full-scale input range of the analog-to-digital converter (ADC) for further digital processing and feedback control.
The typical voltage measurement range of a data acquisition system is from
±0.1 V
to
±10 V.
By selecting the correct voltage range, the user indirectly changes the system gain, maximizing the sampled voltage amplitude at the analog-to-digital converter
(ADC)
input, thereby maximizing the signal-to-noise ratio
(SNR)
and measurement accuracy. In a typical data acquisition system, the signal that needs to be attenuated and the signal that needs to be amplified are processed through different signal paths, which usually leads to more complex system design, requires additional components, and takes up more board space. Solutions that implement attenuation and amplification in the same signal path generally use programmable gain amplifiers and variable gain amplifiers, but these amplifiers often do not provide the high DC precision and temperature stability required for many industrial and instrumentation applications.
One way to build a powerful analog front end that provides attenuation and amplification in a single signal path and provides differential outputs to drive high-performance analog-to-digital converters is to cascade a programmable gain instrumentation amplifier (PGIA) such as the
AD8250
(gain of 1, 2, 5, or 10),
AD8251
(gain of 1, 2, 4, or 8), or
AD8253
(gain of 1, 10, 100, or 1000) with a fully differential funnel (attenuating) amplifier such as
the AD8475
, as
shown in Figure 1. This solution is simple, flexible, high-speed, and provides excellent accuracy and temperature stability.
The programmable gain instrumentation amplifiers described above offer 5.3 GΩ differential input impedance and –110 dB total harmonic distortion (THD), making them ideal for interfacing with a wide range of sensors. At a gain of 10, the AD8250’s guaranteed specifications include: 3 MHz bandwidth, 18 nV/√Hz voltage noise, 685 ns settling time to 0.001%, 1.7 μV/°C offset drift, 10 ppm/°C gain drift, and 90 dB common-mode rejection ratio (DC to 50 kHz). The combination of precision dc performance and high-speed capability makes these amplifiers ideal for data acquisition applications with multiplexed inputs.
The AD8475 is a high speed, fully differential funnel amplifier with integrated precision resistors that provides precision attenuation of 0.4 or 0.8, common-mode level shifting, single-ended to differential conversion, and input overvoltage protection. This easy-to-use, fully integrated precision gain block can handle signal levels up to ±10 V when powered from a single +5 V supply. Therefore, it can match industrial level signals to the differential input range of low voltage, high performance, 16-bit and 18-bit successive approximation register (SAR) ADCs with sampling rates up to 4 MSPS.
The AD825x and AD8475 work together to form a flexible, high performance analog front end, as shown in Figure 1. Table 1 lists the gain combinations that can be achieved, depending on the input and output voltage range requirements.
Figure 1. Data acquisition analog front end using the AD825x PGIA and the AD8475 differential output funnel amplifier.
Table 1. Input voltage ranges and gains achievable with the AD8475 in combination with the AD8250, AD8251, or AD8253
Data acquisition instrument measurement range (V)
|
Peak-to-peak voltage (V)
|
Maximum voltage per input (V)
|
Overall system gain
|
AD825x Gain
|
AD8475 Gain
|
Peak-to-peak voltage at the ADC input
|
AD825x
Input Voltage Limits
(to Protect the ADC)
|
|
±10
|
20
|
4.096
|
0.4
|
1
|
0.4
|
8
|
10.24
|
AD8250 Gain
|
±5
|
10
|
4.096
|
0.8
|
2
|
0.4
|
8
|
5.12
|
|
±2
|
4
|
4.096
|
2
|
5
|
0.4
|
8
|
2.048
|
|
±1
|
2
|
4.096
|
4
|
10
|
0.4
|
8
|
1.024
|
|
±5
|
10
|
4.096
|
0.8
|
1
|
0.8
|
8
|
5.12
|
|
±2.5
|
5
|
4.096
|
1.6
|
2
|
0.8
|
8
|
2.56
|
|
±1
|
2
|
4.096
|
4
|
5
|
0.8
|
8
|
1.024
|
|
±0.5
|
1
|
4.096
|
8
|
10
|
0.8
|
8
|
0.512
|
|
±10
|
20
|
4.096
|
0.4
|
1
|
0.4
|
8
|
10.24
|
AD8251 Gain
|
±5
|
10
|
4.096
|
0.8
|
2
|
0.4
|
8
|
5.12
|
|
±2.5
|
5
|
4.096
|
1.6
|
4
|
0.4
|
8
|
2.56
|
|
±1
|
2
|
4.096
|
3.2
|
8
|
0.4
|
6.4
|
1.28
|
|
±5
|
10
|
4.096
|
0.8
|
1
|
0.8
|
8
|
5.12
|
|
±2.5
|
5
|
4.096
|
1.6
|
2
|
0.8
|
8
|
2.56
|
|
±1
|
2
|
4.096
|
3.2
|
4
|
0.8
|
6.4
|
1.28
|
|
±0.5
|
1
|
4.096
|
6.4
|
8
|
0.8
|
6.4
|
0.64
|
|
±10
|
20
|
4.096
|
0.4
|
1
|
0.4
|
8
|
10.24
|
AD8253 Gain
|
±1
|
2
|
4.096
|
4
|
10
|
0.4
|
8
|
1.024
|
|
±0.1
|
0.2
|
4.096
|
40
|
100
|
0.4
|
8
|
0.1024
|
|
±0.01
|
0.02
|
4.096
|
400
|
1000
|
0.4
|
8
|
0.01024
|
|
±5
|
10
|
4.096
|
0.8
|
1
|
0.8
|
8
|
5.12
|
|
±0.5
|
1
|
4.096
|
8
|
10
|
0.8
|
8
|
0.512
|
|
±0.05
|
0.1
|
4.096
|
80
|
100
|
0.8
|
8
|
0.0512
|
|
±0.005
|
0.01
|
4.096
|
800
|
1000
|
0.8
|
8
|
0.00512
|
Capabilities: Input voltage range and bandwidth
The maximum input voltage range of the AD825x family of PGIAs is approximately ±13.5 V when powered from ±15 V supplies (the AD8250 and AD8251 provide additional overvoltage protection up to 13 V above the supply rails). In this application, the effective limit on the PGIA input voltage range is set by the full-scale voltage range of the ADC input and the gain of the signal path from the sensor to the ADC. For example, the
AD7986
18-bit, 2 MSPS PulSAR ADC
operates from a single 2.5 V supply with a typical reference voltage of 4.096 V, and its differential inputs support voltages up to ±4.096 V (input voltages 0 V to 4.096 V and 4.096 V to 0 V). If the overall gain of the analog front end is set to 0.4, that is, a gain of 1 for the AD825x and a gain of 0.4 for the AD8475, the system can handle input signals with a maximum amplitude of ±10.24 V.
To determine the required combination of gain settings for the system, the full-scale input voltage to the ADC (VFS) and the minimum/maximum current or voltage levels that the sensor is expected to provide should be considered.
The speed and bandwidth of this analog front end are exceptional for its level of accuracy and functionality. The speed and bandwidth of this circuit are determined by a combination of the following factors:
- AD825x Settling Time: For a 10 V output voltage step, the AD8250 settles to 0.001% (16 bits) in 615 ns.
- AD825x slew rate: The slew rate of the AD825x is between 20 V/µs and 30 V/µs, depending on the gain setting. The slew rate of the AD8475 is 50 V/µs, so the system is limited by the slew rate of the AD825x.
- Antialiasing filter (AAF) cutoff frequency: This filter is user-defined and is used to limit the signal bandwidth at the ADC input, prevent aliasing, and improve the signal-to-noise ratio of the signal chain (refer to the amplifier and ADC data sheets for details).
- ADC sampling rate: The AD8475 can drive an 18-bit resolution converter at up to 4 MSPS.
Many data acquisition and process control systems need to measure pressure, temperature, and other low-frequency input signals, so the DC accuracy and temperature stability of the front-end amplifier are critical to system performance. Many applications use multiple sensors that are multiplexed to the amplifier input in a polled manner. Typically, the polling frequency is much larger than the bandwidth of the signal of interest. When the multiplexer switches from one sensor to another, the voltage change seen at the amplifier input is unknown, so the design must consider the worst case - a full-scale voltage transition. The amplifier must be able to settle from this full-scale transition within the allotted switching time, which must also be shorter than the settling time required for the ADC to acquire the signal.
An antialiasing filter (AAF) is recommended between the AD8475 and the ADC input to bandwidth-limit the signal and noise presented to the ADC input, prevent unwanted aliasing effects, and improve the signal-to-noise ratio of the system. In addition, the AAF can absorb some of the ADC input transient current, so the filter can also provide some isolation between the amplifier and the switched capacitor input of the ADC. The AAF is usually implemented using a simple RC network, as shown in Figure 1. The filter bandwidth is calculated by the following equation:
In many cases, the R and C values of this filter are optimized empirically to provide the necessary bandwidth, settling time, and drive capability for the ADC. For specific recommendations, refer to the ADC data sheet.
Conclusion
The AD8475 combined with the AD825x series PGIA can realize a simple, flexible, high-performance, and versatile analog front end. For signal amplification and attenuation processing, the analog front end can provide a variety of programmable gain combinations to optimize different measurement voltage ranges. The performance and programmability of the AD825x are well suited for multiplexed measurement systems, while the AD8475 provides an excellent interface to connect precision analog-to-digital converters. The two amplifiers work in coordination to maintain the integrity of the sensor signal, providing a high-performance analog front end for industrial measurement systems.
For more information on using the AD8475 as a precision successive-approximation ADC driver, see
Circuit Note
CN-0180
:
Precision, Low Power, Single-Supply, Fully Integrated Differential
ADC
Driver
for Industrial-Level Signals
.
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