Simplified Mode Design of Micro-Inductors

Publisher:ZhenxiangLatest update time:2011-11-28 Source: 互联网 Reading articles on mobile phones Scan QR code
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summary:

The possible structures when making the micro-inductor are considered, and the required inductance value is achieved by adjusting the magnetic permeability by controlling the anisotropy of the permalloy core or the quasi-distributed gap of the pattern.

1 Introduction

Recently, many papers have proposed methods of manufacturing micro transformers using thin film magnetic materials, which has given people hope for the miniaturization of power converters using micro manufacturing technology. Thin film micro manufacturing technology can produce extremely fine pattern structures to control eddy current losses, so that metal magnetic alloys can be used below 20MHz. Metal magnetic alloys generally have high flux density and low hysteresis losses. Through design and special optimization, high efficiency and high power density can be achieved. Figure 1 shows a design method for distributed or quasi-distributed gap inductors, which can be used in power conversion circuits. The pulse width modulation (PWM) buck converter is selected as an illustrative example, and its calculation method can also be used in other converter structures.

2 Definition of Simplified Mode

First, analyze the end turns. The lateral width Slat needs to be close to the core, and the lateral spacing St between turns can be ignored (see Figure 1). The first step is to calculate the loss per unit area and the controlled power. Assume that the magnetic field in the window area is horizontal. In this way, the AC loss in the winding can be estimated by one-dimensional analysis, as long as it is based on the ratio between the conductor height hc and the penetration depth δe. It can be described by the AC resistance factor Fr (hc/δc) = Rac/Rdc. For the current waveform, the Fourier expression can be used to estimate the Frk factor for each important harmonic K.

If anisotropic NiFe alloy is used as the core, the main flux can often be referenced to the direction of the magnetization axis without hysteresis. Control eddy current losses and deposit the laminated core into multiple layers. The losses are estimated for each layer and each important harmonic of the flux density waveform and added together. When making this estimate, it is assumed that the flux density is parallel to the layers.

3 Simplified Mode Core Optimization

Figure 1 Schematic diagram (a) and top view (b) of the planar inductor approximate design method

You can refer to the design technical conditions for step-down transformer application and select: input voltage Uin, output voltage Uo, DC output peak-to-peak ripple current Idc, r=△Ipp/Idc, switching frequency ω=2πf.

According to the following formula (9), the power loss in the winding can be reduced by increasing the conductor height hc. However, this improvement ignores the conductor penetration depth greater than 2 times. When making an approximate analysis, hc can be selected to be approximately 1 to 2 penetration depths. When the neglected factors are taken into account, hc can be optimized more accurately. For the power loss in the core, the increase in the number of layers N is almost negligible. Considering the manufacturing cost, N should be optimized, and here, a certain number of layers is assumed. In this way, the height of the core can be adjusted for the maximum power density, resulting in (for example, for the buck converter application) the expression

Where A is the "effective" device area, ρs and ρc are the resistivities of the core and conductor, respectively, D is the duty cycle of the converter, Kcore is a factor that accounts for harmonic losses in the core, and |a1|=2sin(Dπ)/[π2D(1-D)] is the first Fourier coefficient of the current waveform. The variable Bpk is half the peak-to-peak value of the ac flux density. For an optimal design, the total peak flux density should be close to (or equal to) the saturation level Bsat. Therefore, Bpk=Bsat/(1+2/r) is chosen so that Bdc+Bpr=Bsat, and the expression (1) for maximum power density is a function of the given coefficients.

Table 1 shows an example of inductor design for a 5MHz zero-voltage switching buck converter.

The upper part of the table shows the design input parameters, and the lower part shows the output

symbol

name

Numeric

Technical conditions

f

frequency

5MHz

IDC

Output Current

1A

△IPP

Current ripple

3A

Uin

Input voltage

40V

Uo

Output voltage

5V

Material data and technical parameters

N

Core stacking number

12

hsmax

Maximum allowable height of magnetic core

16μm

Bsat

Saturation flux density

1.1T

ρc

Resistivity of conductor (Cu)

2μΩ-cm

ρs

Resistivity of core (80% NiFe)

20μΩ-cm

hsep

Longitudinal separation core

15μm

Wcon

Width of contact with core

40μm

Sres

Slope of photoresist ridges

5.5

Device parameters

L

Required inductance value

292nH

μr

Design required magnetic permeability

490

D

Duty cycle of the converter

12.5%

hs

Total core height

12.0μm

δs

Core penetration depth at 5MHz

2.25μm

W

Length of the core (see Figure 1)

9.2mm

BPK

Flux density fluctuation

0.66T

σ

Current density

3.75A/m2

St

The spacing width of each coil turn

76μm

Wt

Equivalent width of each coil turn

266μm

hc

Conductor height

54μm

δc

Conductor penetration depth at 5MHz

32μm

SLat

Transverse width close to the core

534μm

n

Number of turns

3

Kend

End turn loss resistance factor

1.29

Ks

Length factor due to end turns

1.22

K

Width factor caused by St and SLat

2.62

Computing performance

isat

Current that saturates the core

2.5A

RDC

Designed DC resistance

101mΩ

Fr

Designed AC resistance factor at 5MHz

1.05

Kwind

That is, Pwind=KwindRDCI2DC

1.82

Pwind

Design the total losses in the winding

183mW

Kcore

Harmonic core loss factor

3.62

Pcore

Design the total loss in the core

136mW

Wstot

Total length of device

11.2mm

2Wc.tot

Total device width

4.2mm

Output Power

5.0W

Power density

10.6W/cm2

η

Design efficiency

94.0%

The parameters in Table 1 are an example of assumptions.

In the above optimal design, the distributed power loss between the core and the winding is Pcoreloss/Pwind1oss=2/3. Generally speaking, as long as the hysteresis loss is ignored, the core lamination is thin enough to be comparable to the penetration depth, and the inductance requirement can be met by adjusting the magnetic permeability, then all optimized designs of the planar inductor and transformer constructed in Figure 1 will maintain this ratio.

4Inductance adjustment

One way to meet the inductance requirement is to adjust the core permeability, which creates a favorable magnetic field configuration and avoids the inductance suppression introduced during the optimization process.

For optimal design, in order to obtain the required inductance, the effective permeability is required

Where σopt(η) is the current density per unit conductor width at an efficiency of η. For an optimal design, once the efficiency η is selected, the magnetic permeability μr is fully specified.

For example, assuming that the parameters in Table 1 are designed in the range of 95.5% <η <98.5%, ignoring the end turns and other "ineffective" spacing, the relative permeability value may be in the range of 100 <μr <400, as shown in Figure 3. For a certain efficiency, the actual design generally requires a higher permeability than shown in Figure 3, because the spacing close to the core and the spacing of the insulation turns are ignored in the simplified model analysis, so the length of the magnetic path is increased (see Figure 1). The waveform of the current in the inductor is shown in Figure 4.

Figure 2 shows the relationship between power density and power consumption percentage when the number of layers N = 12. Both axes are logarithmic, and the parameters are assumed in Table 1.

Figure 3 shows the relationship between the magnetic conductor and the power consumption percentage when the number of layers N = 12. Both axes are logarithmic, and the parameters are assumed in Table 1, ignoring the end turns and other "invalid" areas.

Reference address:Simplified Mode Design of Micro-Inductors

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