Development of Pulse Power Supply for Electroplating

Publisher:星辰耀眼Latest update time:2011-11-11 Source: 互联网 Reading articles on mobile phones Scan QR code
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Pulse power supply can change the electrodeposition process of metal ions by controlling the waveform, frequency, duty cycle and average current density of the output voltage, so that the electrodeposition process can vary within a wide range, thereby obtaining a coating with certain characteristics in a certain plating solution. Pulse nickel plating can replace DC nickel plating to obtain a finely crystalline coating, which can reduce the porosity and internal stress of the nickel layer, increase the hardness, reduce the impurity content, and use a higher current density to increase the plating speed〖1〗.

According to the pulse nickel plating process, we have developed a pulse nickel plating switching power supply with a maximum peak current of 1000A and a maximum peak voltage of 30V. The process is as follows:

Nickel sulfate (NiSO4·7H2O): 180~240g/L

Magnesium sulfate (MgSO4·7H2O): 20~30g/L

Sodium chloride (NaCl): 10-20 g/L

Boric acid: 30-40

pH value: 5.4

Temperature: Room temperature

Waveform: rectangular wave

Frequency: 500~1500Hz

Duty cycle: 5% to 12%

Average current density (A/dm2): 0.7

2 Basic power supply scheme

The three-phase 380V/50Hz AC power passes through the EMI electromagnetic compatibility device, undergoes bridge rectification, and then undergoes inversion and transformation, and then rectification, filtering, energy storage, and finally voltage chopping to output a unidirectional pulse voltage. This power supply design is divided into two parts: the front-stage switching power supply and the back-stage chopper. The working principle block diagram of the pulse power supply circuit is shown in Figure 1.

Figure 1 Pulse power supply circuit working principle block diagram

3. Key points of design of switching power supply

3.1 Principle of Switching Power Supply

The main circuit is composed of EMI electromagnetic compatibility device, rectifier circuit, inverter circuit, high-frequency transformer, high-frequency rectifier and high-frequency filter circuit; the control circuit is composed of current and voltage double closed loops, with the current loop as the inner loop and the voltage loop as the outer loop; the protection circuit is set with primary maximum current limit, output overcurrent, short-circuit protection, and maximum output voltage limit.

3.2 Basic requirements

In addition to meeting the requirements of a general power supply, a pulse switching power supply is also required to have large short-term output power, good dynamic characteristics, high efficiency, and be able to operate stably and reliably under high-power pulse output conditions.

3.3 Design of switching power supply

(1) High frequency The maximum average capacity of the power supply output is 1000A peak current, 30V voltage, 10% duty cycle, i.e. 3kW. Based on the actual requirements for pulse switching power supplies, it is advisable to adopt high-frequency technical solutions and select the topology of full-bridge inverter. Increasing the frequency is an important way to achieve miniaturization. It can reduce the volume of the power transformer and the filter inductance, and the output inductance is an important factor affecting the dynamic response. High frequency is also an important measure to improve the dynamic response. The speed of power supply adjustment increases with the increase of frequency. Thereby achieving the purpose of rapid voltage stabilization.

(2) Capacity miniaturization Due to the small duty cycle D, for example: D = 0.1,

Then the peak current will be ten times the average current. If it is designed according to the peak current, it is not difficult to achieve, but the power supply is bulky and uneconomical. If it is designed according to the average current, the power supply requirements are very stringent, requiring the power supply to be small and reliable, and not to produce excessive voltage drop during load mutations. For a switching power supply with a supply voltage of 2 to 30Vd.c., a peak current IP=1000A, D=0.05~0.1, and an average current ICP=50A~100A, if it is designed according to the average current, there are the following problems:

① When the power supply suddenly adds ten times the average current within milliseconds, overcurrent protection will occur;

② When the power supply cannot provide peak current within milliseconds, output jump will occur, which is the sudden drop process〖2〗.

This device adopts 1.5 times the average current design to ensure that the switching power supply has sufficient margin, while appropriately increasing the energy supply capacity of the power supply.

(3) High voltage feedback gain The power supply should have a sufficiently high voltage feedback to improve the dynamic characteristics of the power supply and ensure the stability of the pulse output voltage.

(4) Improving the ability of switching power supply to maintain output voltage

Since the power supply works under large pulse current conditions, it must go through at least several cycles of adjustment before it can stabilize, and it must withstand the impact current without causing protection action. In order to reduce the abnormalities caused by the impact (spikes, drops, etc.), it is advisable to set a storage capacitor at the load end.

The design method is as follows:

The energy stored in the capacitor is:

EC=0.5C0U2

Under the output peak power P0P, when the output power of the switching power supply is PO1, the output square wave width TON is maintained, the output voltage changes ΔU=U1-U2, and the energy stored in the capacitor is shown as follows:

0.5C0(U12-U22)=(P0P-PO1)×TON

The energy storage capacitor C0 is obtained from the above formula:

C0={2(P0P-PO1)×TON}/(U12-U22)

At the same time, the energy storage capacitor must be an electrolytic capacitor with small ESR and good high-frequency performance.

(5) Adding overcurrent limitation to the inverter bridge: Given that the output capacitance of the switching power supply is particularly large, the inverter bridge needs to withstand particularly large impact currents at the moment of startup and during pulse output. When the inverter bridge is added with single-cycle overcurrent limitation, it can effectively ensure that the power devices of the inverter bridge will not exceed the design current value, thereby greatly improving the reliability of the switching power supply.

4 Voltage chopping control

4.1 Design Ideas

The control system is designed with SG3525PWM chip as the core. The maximum output duty cycle is limited by using CD4017B chip for 8-frequency division. The main circuit uses field effect tubes in parallel. The voltage chopping control principle diagram is shown in Figure 2.

Figure 2 Voltage chopping control principle diagram

4.2 Selection of main circuit

Because the main circuit is voltage chopping, there is a large current impact. For this reason, this device uses field effect tubes in parallel. IR's product FB180SA10 is more suitable. Its VDSS=100V, RDS(ON)=0.0065Ω, ID=180A(TC=25℃) or 120A(TC=120℃). At the same time, it uses an insulated TO-227 package, which is easy to connect in parallel and has a low internal inductance. This device uses 12 in parallel. 4.3 Control and protection The principle block diagram of SG3525 is shown in Figure 3. It has a 5.1V reference voltage regulator with a temperature coefficient of 1%, an error amplifier, a sawtooth oscillator with a frequency of 100Hz~400kHz (its value is determined by the external resistor Rt and capacitor Ct), a soft start circuit, a synchronization circuit, a shutdown circuit, a pulse width modulation comparator, an RS register and a protection circuit.

Figure 3 Schematic diagram of SG3525.

The 1st and 2nd pins of the error amplifier of SG3525 are used to adjust the duty cycle of the output. In the actual debugging process, it is found that due to the small duty cycle, the adjustable range of the voltage comparator input voltage is particularly small, and debugging is very difficult. For this reason, a frequency division circuit is specially designed, that is, the CD4017B decimal counting chip and its peripheral circuits are used to divide the 4-pin oscillator output signal of SG3525 by 8, and the shutdown function of the 10th pin of SG3525 is used to block 6 of the 8 output signals of the 4th pin of SG3525, so that 11 and 14 pins each have 1 pulse output, as shown in Figure 4 and Figure 5. Because the maximum duty cycle of the 11th pin is about 48%, the actual output duty cycle after frequency division is about 12% at most, and the minimum duty cycle is determined by R7. The protection of this part adopts single-cycle current limiting protection, with the gate-source resistance of the field effect tube as the sampling signal. When the current exceeds the limit value, the cycle drive signal is turned off through the 10th pin of SG3525 to achieve single-cycle protection.

Figure 4 The waveform of SG3525 pin 4 and pin 11 under normal conditions

Figure 5 Simulation diagram of CD4017B and peripheral circuit input and output

4.4 Simulation and Experiment

Figure 4 shows the corresponding relationship between the oscillator output (pin 4) CH1 and the PWM output (pin 11) CH2 when SG3525 has no frequency division. It can be clearly seen from the figure that the oscillator output pulse appears on the front and back sides of the PWM pulse width, and its pulse width is about 5μs to 10μs, which is enough time for CD4017B to complete the action. Figure 5 shows the simulation diagram of CD4017B and peripheral circuit input and output. From Figure 5, we can clearly see that when the CLK terminal input frequency is 1kHz and the pulse width is 5μs, the waveform of the output OUT, i.e. the cathode of D5 to D9, is consistent with the design. After filtering, the waveform reaching pin 10 of SG3525 is relatively regular. For the convenience of analysis, the timing diagram of the relevant pins is also given. At the same time, the CLK rising edge flip is adopted to ensure the correctness of the control timing, and the blocking of 6 pulses is adopted to avoid the influence of interference and initial state on the output PWM waveform.

5 Conclusion

After the device was put into operation, after nearly a year of on-site inspection, it was proved that the operation was stable and reliable, and various technical indicators met the design requirements, which improved the quality of electroplating products, saved electroplating time, and fully met the process requirements.

Reference address:Development of Pulse Power Supply for Electroplating

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