Power Management Solutions for Microprocessors

Today, leading companies in the field of power management face enormous challenges in powering advanced microprocessors. This challenge arises from the fact that powering microprocessors is a constantly evolving goal.

As the current demands of each successive generation of leading-edge microprocessors have increased, the operating voltage has needed to be reduced to keep power consumption at manageable levels . At the same time, these high current levels introduce large current change rates (di/dt), making voltage regulation (i.e., voltage regulation) much more difficult. To alleviate this problem, voltage regulation tolerances have been decreasing. Five years ago, ±250mV was acceptable; by 2005, the maximum regulation tolerance of any microprocessor power supply will be limited to ±25mV.

Looking ahead to advanced microprocessors in 2005, it is expected that the current level of future power supply solutions will increase from the current 60A to 130A, while the voltage will drop to 1.1V. This is already a big enough challenge, but even more stringent requirements will follow, namely how to achieve ±25mV regulation at 800A/usdi/dt. More phases will be used in multi-phase, point-load converters, and frequencies will continue to increase from the current 500kHz to 2MHz in 2005. In addition, the pressure to maintain the current cost per ampere level will continue. Overall, the challenges that microprocessors bring to DC/DC converter design include many technologies and expertise in many fields. To succeed, manufacturers must have benchmark power silicon capabilities; secondly, the packaging solution must be absolutely first-class; and thirdly, creative control IC solutions are essential. Finally, an advanced power architecture must be adopted to integrate all of this together.

Power Silicon Wafer

In the area of ​​power silicon, leading players in the power management industry, such as International Rectifier ( IR ), have made great strides in meeting the expected demands that microprocessors will place on them in the coming years.

Figure 1 shows the switch figure of merit (FOM), a typical way to judge the performance of a control field effect transistor (FET) or high-side FET in a buck topology. By moving from a 1-2 micron planar topology to a sub-micron channel, the switch FOM has been improved by more than 1-3 times. Figure 2 shows the FOM for a synchronous or low-side FET. Here, it is actually the conduction losses that dominate the FOM in the on- resistance time domain. In the past two years alone, the FOM has been improved by about 3 times by moving from 1-2 micron channel technology to deep sub-micron levels, with more room for improvement in the future.

To meet the demands of microprocessors in the next few years, the industry will need to continue along this path of improvement. For control FETs, another 3x improvement in quality factor can be achieved by moving to finer lines and lateral topologies. In the synchronous FET field, another 2.5x improvement can be achieved by using finer and finer line geometries in silicon channel technology. In the further future, the industry will need to adopt alternative materials such as corundum and gallium nitride to keep pace with ambitious development plans. Otherwise, advances in power semiconductor devices will not be enough to meet the requirements of future microprocessors.

Innovative packaging

In some ways, the package itself has become a barrier to progress, as in the case of the SO-8. This package is by far the most popular package for point-of-load converters for microprocessors. The SO-8 has a package resistance (DFPR) of 1.5 milliohms, and the silicon that can be mounted inside it has a lower impedance than the package resistance. The SO-8 also performs poorly in terms of thermal resistance, both downward to the PCB and upward to the air (18°C/W).

To address these issues, new packages have been developed, such as IR 's PowerPak, to improve DFPR and thermal resistance. Other packaging advances that address these issues are also emerging, such as copperstrap, LFPak, and baseless SO-8. However, the industry must develop other novel packaging methods to further improve thermal resistance. One promising new packaging technology pushes heat up and releases it into the air above the circuit board, rather than forcing it down into the PCB, which is already absorbing heat from several other components. To minimize the silicon area and impedance, this new DIRectFET package uses a copper "top hat" to establish a very strong mechanical connection with the upper and lower bidirectional thermal channels, greatly improving DFPR and thermal resistance in both directions. The design effectively doubles the power density on the board.

New Power Architecture

The next step is to develop innovative control schemes and new power architectures that scale with future generations of microprocessors to meet the growing demands that these processors will place. As the industry moves toward multiphase architectures for synchronous buck converters, there are many options available. The first option is to integrate the controller and driver ICs into a single chip . This will reduce component count and bill of materials costs, but long traces will limit high-frequency performance. The performance of this design will be limited by the large amount of noise and heat generated by the driver and transferred to the controller IC, and because the number of phases is set by the selected IC, this design will not have the flexibility to increase the number of phases as needs change. Taking the IC cascade approach will only increase the cost and complexity of the solution.

The second option is to separate the driver IC from the control IC. This shortens the traces and ensures higher frequency performance. Because the driver IC and power output stage are very tightly coupled together, they will generate less noise. However, this design still has the disadvantages of a fixed number of phases, and the current sensing must be conducted through long interconnect traces, which may cause delays and increase complexity.

A more attractive approach is to re-partition the functions that were previously performed by the controller and driver ICs within the chip . For the controller, functions such as programmable voltage discrimination circuits , a PWM ramp oscillator, an error amplifier, bias voltages, and error detection appear only once in a multiphase design. The driver IC now becomes a phase IC that manages all the functions that are repeated in each phase of the design. These functions include current sharing, PWM, phase timing, current sensing, and dual gate drivers. Communication between the control and phase ICs is accomplished by a 5-wire analog bus that transmits the following information: bias voltage, phase timing, current sensing/sharing, PWM control, and reference regulation voltage.

Such a design minimizes component count, removes the undesirable effects of driver noise and heating, and allows the number of phases to be increased as needed. Short driver traces and short current sensors support higher frequencies and simplify board layout. This flexible phase topology allows designers to adapt to the more demanding power requirements of next-generation microprocessors without expensive redesigns.

Integrated Solutions

Providing a benchmark for future microprocessors The final key step in the power management solution is to integrate advanced power silicon design with first-class packaging , innovative control ICs and new power architectures into a fully scalable whole. Only through the co-design of the entire system solution and the co-matching of component performance can an excellent solution be developed.

Therefore, IR developed the iPOWIR series of products. These modular building blocks include driver ICs with FETs, flyback diodes , and other components required to implement a complete multi-phase DC/DC power supply. These devices can be coupled very tightly together and can operate very efficiently even at very high frequencies as shown in the figure below. In addition to excellent performance in efficiency and power density, these integrated building blocks also improve the reliability of the entire design. Compared with embedded discrete designs that are affected by the uneven performance of various discrete components, these devices have been 100% tested to ensure a small parameter variation range and highly predictable performance.

In short, future microprocessors require robust DC/DC power management solutions that integrate the most advanced technology and the highest process. The leading products will be those that combine benchmark power silicon technology with high-density packaging technology, cutting-edge circuit design and advanced ICs into an integrated, modular power design that can be upgraded and expanded with the continuous evolution of microprocessors.