Implementation of digital control of switching power supply

Although many in the industry believe that analog and digital technologies will soon compete for dominance in the control circuits of power supply regulators , the reality is that when it comes to feedback loop control, the two technologies appear to be coexisting happily.

Indeed, many power management vendors offer different approaches. Some of the original programmable advantages of digital control are now even found in controllers and regulators that use analog feedback loops. Of course, there are still some attractions to digital power.

This article focuses on pulse width modulation (PWM), pulse density modulation (PDM), and pulse frequency modulation (PFM) switching regulators and controller ICs. Some of these integrate the driver that controls the transistor or transistors that actually switch, while others do not. Still others even integrate the switching FETs if they provide the right load. So the question of digital versus analog depends on how the regulator's control loop is closed.

Figure 1 shows variations on the two most common PWM switch topologies, the step-down and step-up ( buck / boost ) converters. In the synchronous configuration, a second transistor replaces the diode . In a sense, the use of pulse-width modulation makes these converters "quasi-digital," at least compared to a 723-type linear regulator based on a series pass element. In fact, PWM makes it possible to use a digital control loop. However, the converters in Figure 1 lack circuitry to control the duty cycle of one or more switches, which can be implemented in the analog or digital domain.

Regardless of whether analog or digital techniques are used, there are two ways to implement a feedback loop: voltage mode and current mode. For simplicity, let's first consider how it is implemented in the analog domain.

Figure 1: A switch-mode DC-DC power supply is quite simple without a controller. Whether used to step up or step down a voltage, its success depends on how the designer arranges some basic components.

In a voltage-mode topology, a sample of the output voltage is subtracted from a reference voltage to create a small error signal that is compared to the oscillator ramp signal (Figure 2). As the circuit output voltage changes, the error voltage also changes, which in turn changes the comparator threshold. This, in turn, causes the output signal width to change. These pulses control the on-time of the regulator's switching transistor. As the output voltage increases, the pulse width decreases.

Figure 2: Voltage-mode feedback (in this case in the analog domain) comprises a control loop.

One advantage of current-mode control is its ability to manage inductor current. A regulator using current-mode control has a current loop nested within a slower voltage loop. This inner loop senses the peak current of the switching transistor and keeps the current constant by controlling the on-time of each transistor on a pulse-by-pulse basis.

At the same time, the outer loop senses the DC output voltage and provides a control voltage to the inner loop. In this circuit, the slope of the inductor current generates a ramp that is compared to the error signal. When the output voltage drops, the controller provides more current to the load (Figure 3).

Figure 3: Current mode feedback uses a nested feedback loop. Unlike voltage mode, it needs to account for the current in the inductor.

In these control topologies, the gain of the control loop cannot exceed unity at any frequency where the phase shift of the loop reaches 360°. The phase shift includes the inherent 180° phase shift caused by feeding the control signal into the inverting input of the feedback op amp, the additional delays of the amplifier and other active components, and the delays introduced by capacitors and inductors (especially the large capacitors of the output filter).

Stabilizing the loop requires compensation for gain variations and phase shifts over a range of frequencies. Traditionally, stabilizing a power supply with analog PWM has usually required an empirical approach: you experiment with different combinations of passive components on an actual board laid out identically to the production board , and observe the circuit's time-domain response as the supply voltage and load demands are varied. Lately, things have gotten much easier. As analog controller companies now implement various "insert a value in a register" features first introduced on digital controllers in their own models.

Digital control loop

Most digital implementations of voltage-mode control include an analog-to-digital converter (ADC), a microcontroller or DSP that implements some control algorithm, and a digital pulse-width modulator (DPWM) that picks up the controller output and produces the signal needed to drive one or more transistors that perform the switching action (Figure 4).

Figure 4: The digital implementation of voltage-mode control eliminates the sawtooth generator. In other respects, they correspond closely to the analog implementation.

First, the ADC generates a digital representation of the output voltage that is fed into the controller. The control algorithm is the familiar proportional-integral (PI) or proportional-integral/differential (PID) algorithm.

In a PID controller (a more complex example), each ADC input is subject to an algorithm based on a series of coefficients. The proportional coefficient is a gain factor that is related to sensitivity. The integer coefficient adjusts the PWM duty cycle according to how long the error occurs. The induction coefficient compensates for the time delay of the loop (phase is more effective). Taken together, the coefficients of the PID algorithm determine the frequency response of the system.

The controller then converts the ADC's output voltage representation into the pulse duration (duty cycle) information required to maintain the desired output voltage. This information is then passed to a DPWM, which performs the same drive signal generation function as the analog PWM.

Note the difference between the analog and digital control schemes in managing the switching transistor. The analog controller triggers the switching transistor to the ON state at the rising edge of the clock and triggers the transistor to the OFF state when the voltage ramp reaches a preset threshold voltage; the PID controller calculates the required duration of the ON and OFF states of the switching transistor.

In theory, analog control can provide a continuous precision output voltage, but the interaction of ADC precision and sampling rate, coupled with the DPWM switching rate, makes things a little complicated.

For example, the DPWM must have a higher precision than the ADC. Otherwise, a 1-LSB change in the ADC output may cause the DPWM to change the output voltage by more than 1-LSB. As a result, the output voltage switches steadily between two values, a state known as "limited cycling."

Avoiding loops is not easy, however. This is because providing a higher precision in the DPWM means increasing its pulse rate (which determines how many bits can be generated in any given period of time). However, the DPWM pulse rate limits the time it has to compress all the bits coming from the controller. The example in the Artesyn white paper presents a hypothetical DPWM with a 1MHz switching rate and a 10-bit ADC. Calculations show that the modulator requires a pulse rate in excess of 1 GHz.

Of course, such high speeds are impractical, so the designer of the digital controller must find an alternative solution. One solution is to introduce some DPWM clock jitter. The regulator output filter averages any pulse train fed into it, which makes it possible to adjust the width of each mth output pulse by the equivalent of 1 LSB.

This increases or decreases the average value of the pulse train by a factor of 1/m with 1 LSB accuracy. If a 1-LSB at the controller input changes the output pulse train by 10mV on average, this will shorten every four pulses by 10mV, and the average output voltage through the filter will be reduced by 10mV/4 or 2.5mV.

Alternative Workaround

While almost all digital controllers use ADCs and program memory controllers, this is not the only possible solution. Last year, Zilker Labs noted that achieving the step response required by the latest Pentium-class processors (hundreds of amps per nanosecond) required a fairly fast and power-hungry DSP in the controller.

As a lower-power alternative, the company introduced a controller based on comparators (rather than ADCs) and state machines (rather than program storage solutions).

Furthermore, the simple buck or boost topology described above is not the only way to achieve digital voltage regulation. Vicor has proposed a completely different solution, which is based on a much more complex regulator topology than the simple buck or boost topology described above and redistributes the basic elements in the power architecture.

Finally, digital control was once a breakthrough technology, but many of the benefits of digital control are now also found in analog controlled regulators.

The inherent 180° phase shift, the added delays of the amplifier and other active components, and the delays introduced by the capacitors and inductors (especially the large capacitors of the output filter).

Stabilizing the loop requires compensation for gain variations and phase shifts over a range of frequencies. Traditionally, stabilizing a power supply with analog PWM has usually required an empirical approach: you experiment with different combinations of passive components on an actual board laid out identically to the production board, and observe the circuit's time-domain response as the supply voltage and load demands are varied. Lately, things have gotten much easier, as analog controller companies now implement various "insert a value in a register" features first introduced on digital controllers in their own models.